| --- Log opened Mon Mar 27 00:00:01 2017 | ||
| shorne | stekern: I have been looking at other archs and docs. It seems pretty normal that each core needs its own timer | 00:42 |
|---|---|---|
| shorne | Also, I dont see any other case where they do timer syncing | 00:42 |
| shorne | Maybe I am looking at it the wrong way, do you have some reference to where other archs do syncing? | 00:43 |
| shorne | I do see there is a timekeping api which has read_persistent_clock(), which we dont implement | 00:44 |
| shorne | but that is for reading cmos clock (i.e seconds since 1970) | 00:45 |
| shorne | it uses that to sync some stuff | 00:45 |
| shorne | Maybe its about the clocksource vs clock_event_device? | 01:04 |
| shorne | i.e. clock event should be one per cpu | 01:04 |
| shorne | clock source could be just 1 | 01:04 |
| shorne | anyway, if you have any pointers it would help | 01:05 |
| stekern | IIRC, what you just said is correct | 01:52 |
| stekern | but, all the clock events should be driven from the same source | 01:59 |
| bandvig | Currently in FuseSoC CPU operates at the same clock rate as Wishbone. Are there examples where OR1K CPU operates on clock higher than bus? | 06:39 |
| shorne | ok, booting on hardware not working, need to bisect | 18:09 |
| -!- [X-Scale] is now known as X-Scale | 21:42 | |
| -!- [X-Scale] is now known as X-Scale | 23:53 | |
| --- Log closed Tue Mar 28 00:00:03 2017 | ||
Generated by irclog2html.py 2.15.2 by Marius Gedminas - find it at mg.pov.lt!