IRC logs for #openrisc Monday, 2017-03-27

--- Log opened Mon Mar 27 00:00:01 2017
shornestekern: I have been looking at other archs and docs.  It seems pretty normal that each core needs its own timer00:42
shorneAlso, I dont see any other case where they do timer syncing00:42
shorneMaybe I am looking at it the wrong way, do you have some reference to where other archs do syncing?00:43
shorneI do see there is a timekeping api which has read_persistent_clock(), which we dont implement00:44
shornebut that is for reading cmos clock (i.e seconds since 1970)00:45
shorneit uses that to sync some stuff00:45
shorneMaybe its about the clocksource vs clock_event_device?01:04
shornei.e. clock event should be one per cpu01:04
shorneclock source could be just 101:04
shorneanyway, if you have any pointers it would help01:05
stekernIIRC, what you just said is correct01:52
stekernbut, all the clock events should be driven from the same source01:59
bandvigCurrently in FuseSoC CPU operates at the same clock rate as Wishbone. Are there examples where OR1K CPU operates on clock higher than bus?06:39
shorneok, booting on hardware not working, need to bisect18:09
-!- [X-Scale] is now known as X-Scale21:42
-!- [X-Scale] is now known as X-Scale23:53
--- Log closed Tue Mar 28 00:00:03 2017

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