--- Log opened Thu Dec 08 00:00:17 2016 | ||
shorne | _franck_: that is what I am thinking "not only solution" im looking at other examples for something | 02:31 |
---|---|---|
olofk_ | _franck_: Seems to work! Awesome, thanks | 02:53 |
promach | how to implement openRISC on Parallella ? Do I need to port mor1kx to Parallella ? and also I found that Parallella Zynq PS has control to almost all the peripherals | 03:16 |
promach | anyone have any advise ? is Parallella platform good for softcore CPU development ? | 03:16 |
olofk_ | promach: I wouldn't say that Parallella is particularly suited for doing softcore development | 03:26 |
olofk_ | OTOH, eliask, ported a RISC-V CPU to Parallella as a GSoC project this year | 03:26 |
promach | yes, I saw that too. A rocket RISC-V core | 03:27 |
olofk_ | I suck at C. Am I supposed to use open or fopen to open files? :) | 03:56 |
shorne | olofk_: it matters if you want to do fread or read :) | 04:02 |
shorne | 'f' one gives you a FILE plain one gives you an int file descriptor | 04:02 |
shorne | if you want buffers and caches handled for you use 'f' functions | 04:04 |
shorne | you probably know all of that | 04:04 |
LoneTech | olofk_: open is low level posix, fopen is C standard library | 04:36 |
olofk_ | Seems like the f family is the right choice for me then. Just want to do simple reads and writes | 05:43 |
-!- olofk_ is now known as olofk | 05:45 | |
promach | http://openrisc.io/newlib/building.html upstream or development sources ? | 21:42 |
promach | http://openrisc.io/newlib/multicore.html how many FPGA LUT resources would this multicore LUT will take approximately ? | 22:09 |
shorne | promach: all building should currently be done with the openrisc/ repo sources in my opnion | 23:09 |
shorne | newlib has a few patch missing upstream | 23:10 |
shorne | gcc is not upstream | 23:10 |
shorne | binutils-gdb has a lot pending upstream | 23:10 |
--- Log closed Fri Dec 09 00:00:19 2016 |
Generated by irclog2html.py 2.15.2 by Marius Gedminas - find it at mg.pov.lt!