--- Log opened Fri Sep 16 00:00:14 2016 | ||
olofk | Anyone got experience with doing FFT in FPGAs? | 01:55 |
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-!- knz_ is now known as knz | 06:07 | |
ZipCPU|Laptop | olofk: Yes. | 06:57 |
ZipCPU|Laptop | I built an open core FFT builder some time ago. | 06:57 |
ZipCPU|Laptop | It's a C++ program that builds the Verilog necessary to accomplish your FPGA. | 06:58 |
ZipCPU|Laptop | It's designed to handle two samples per clock, but it shouldn't be too hard to modify if you have other needs. | 06:58 |
ZipCPU|Laptop | I've also got code lying around to do perform a high resolution FFT as well. | 07:00 |
olofk | ZipCPU|Laptop: Cool. Want to share? | 07:01 |
olofk | And what's the interface? Do you stream in the samples, or are they fetched from a memory? | 07:02 |
ZipCPU|Laptop | The open core FFT builder builds a core that streams in two samples at a time, together with a CE signal. | 07:02 |
ZipCPU|Laptop | The CE signal is used to gate the core to whatever speed you are actually running at, although it uses the amount of fabric it would need to run at full speed. | 07:03 |
ZipCPU|Laptop | The output is similar: when the input CE is high, there's a valid pair of samples on the output. | 07:03 |
ZipCPU|Laptop | The only trick is the first sample. | 07:04 |
shorne | stekern: If you have no objection, I am going to send this patchset to the kernel list looking for help getting it merged https://github.com/stffrdhrn/linux/commits/openrisc-fixes-4.8 | 07:04 |
ZipCPU|Laptop | On the first sample of the output, the core also strobes a wire, so you know how to line yourself up. | 07:04 |
shorne | I just put Rob Herring's recent patch on as a bonus | 07:04 |
shorne | I tested and it all seems ok | 07:04 |
stekern | shorne: LGTM, but you should squash "openrisc: copy thread pointer from userregs" and "openrisc: Add thread-local storage (TLS) support" together into one patch | 07:06 |
stekern | (i.e. just update Christian's change with the change in the latter) | 07:07 |
shorne | cool, no problem... | 07:09 |
shorne | I squashed and kept blueCmd's original commit message, added you as signed off by if thats ok | 07:17 |
shorne | I push forced the changes to here : https://github.com/stffrdhrn/linux/commits/openrisc-fixes-4.8 | 07:19 |
ZipCPU|Laptop | olofk: I should also point out, the core is *quite* configurable. You pick the FFT size, whether forward or inverse. You pick the input and output sample width, together with the coefficient size and the internal sample widths, etc. Defaults are provided for anything you don't configure. | 07:20 |
ZipCPU|Laptop | Oh, and you can also pick the number of hardware multiplies you have available. It will use up to that number, and then do multiplies in fabric afterwards. (Fabric muliplies are quite painful, though.) | 07:21 |
blueCmd | shorne: that's fine by me | 07:21 |
olofk | ZipCPU|Laptop: Regarding hw multipliers, do you target Cyclone IV primitives? | 07:24 |
shorne | blueCmd: thanks for acking | 07:25 |
ZipCPU | olofk: I've only tested the core with Xilinx hardware. | 07:27 |
ZipCPU | Would you like to test it on Altera and help me improve the core? | 07:27 |
ZipCPU | The core depends upon the multiplies being inferred. | 07:28 |
olofk | Are not the fabric multiplers inferred too? Or do you have a hand-written implementation for those? | 07:31 |
ZipCPU | The fabric multipliers are hand-written. | 07:32 |
olofk | ok | 07:32 |
ZipCPU | I had to guarantee a known timing, and for an arbitrary width ... hence the hand-written implementation. | 07:32 |
olofk | Yeah, I need an FFT, and as I have an excellent support person for this one, I'm happy to try it out :) | 07:33 |
ZipCPU | If two samples per clock is overkill for what you need, it shouldn't be too hard to modify the core for a single sample per clock. I just haven't done it (yet). | 07:34 |
blueCmd | shorne: thanks for taking care of things :) | 07:34 |
olofk | blueCmd: Are you coming to orconf this year? | 07:35 |
blueCmd | olofk: nope, too many other things going on in my life currently | 07:39 |
blueCmd | olofk: moving and switching work | 07:39 |
olofk | Aha. Changing employer, or just updating your location again? | 07:40 |
blueCmd | i do look at my FPGA board from time to time and it would be fun to pick up some kind of project | 07:40 |
blueCmd | olofk: employer | 07:40 |
olofk | blueCmd: Yeah. I do that too. With my eight FPGA boards just collecting dust :( | 07:40 |
blueCmd | olofk: moving to el Stockholmo and joining a small app company | 07:40 |
olofk | aha. Interesting | 07:40 |
olofk | If you're there on 13 October, I will do a breakfast seminar on Open Source Silicon | 07:41 |
olofk | We are announcing it on monday :) | 07:41 |
blueCmd | I am, it's like 3 days after I start :P | 07:41 |
_franck__ | FYI, lot of cool stuff here: https://github.com/hamsternz?tab=repositories | 07:46 |
olofk | _franck_: I think he's been trying to do a webserver in HDL :) | 07:48 |
olofk | Seen him on tiwtter | 07:49 |
shorne | olofk: he needs fusesoc | 07:49 |
olofk | shorne: They all do :) | 07:49 |
_franck__ | this display port stuff is quite cool | 07:49 |
_franck__ | I was thinking doing one | 07:50 |
olofk | And I need more people to create packages. Been writing a ton of cores | 07:50 |
ZipCPU|Laptop | olofk: What do you mean by needing more people to create packages. How are packages different from cores? Are these the "systems" within orpsoc-cores that you are referencing? | 08:39 |
olofk | I mean .core files | 08:45 |
ZipCPU|Laptop | You mean ... like if I just added .core files to all my cores, then they'd be more useful? | 08:45 |
olofk | I've done most of the cores in the FuseSoC standard library myself. It's not that hard, but it takes a while for each of them | 08:46 |
olofk | Yes. That is what I mean. The point is to make them easier to integrate in other projects | 08:46 |
ZipCPU|Laptop | Ok. Got it. | 08:46 |
shorne | stekern: ok, I sent a mail explaining the situation, hopefully I dont get too badly burt for sending spam | 10:53 |
shorne | So, those patches to the kernel list have 2 issues (I hsould have found myself) | 18:07 |
shorne | patch 3/7 needs to have the comment fixed up | 18:08 |
shorne | patch 1/7 breaks non openrisc builds | 18:09 |
shorne | Ill fix both | 18:09 |
--- Log closed Sat Sep 17 00:00:15 2016 |
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