IRC logs for #openrisc Saturday, 2016-06-18

--- Log opened Sat Jun 18 00:00:58 2016
olofshorne: Great work. I also think we're ready to submit gdb. It's definitely good enough16:32
ZipCPUolof: Remember when I asked you about building an SD card controller using the SPI port?  The controller is now built, and I just pushed it to OpenCores.16:34
olofFor newlib, I know that we need to add code for the reentrant *_r functions (like timer_r and so on). This is mostly just erroring out and returning -1, so it's quickly done16:35
olofshorne: Like this Never submitted that one, I think16:36
olofZipCPU: Cool. Good work. Link?16:36,sdspi16:36
ZipCPUI just finished writing up the Specification today.  It might read a little raw, but ... like I said, I just finished writing the spec today.16:37
olofI'll try to make a FuseSoC core for it then :)16:37
olofZipCPU: Looks like my simulation fails because there is no main function in the testbench16:46
ZipCPUHmm ... the test bench code was used in the XuLA2-LX25 SoC, as part of the Verilator build.  It's not designed as a TB of its own.16:47
olofWell, in that case my .core file is finished :)16:48
ZipCPUTo test it (initially), I linked the bench/cpp files in the sdspi core with the XuLA2 Verilator build, and then ran the test bench as a ZipCPU program running within the XuLA2-LX25 SoC.16:49
olofThis is what it looks like
ZipCPUAfter it worked there, I pressed it into service with an actual card--only to discover just how good my TB was ;)16:49
olofOh well. Got to sleep now. Body and mind is tired from running a half marathon today16:51
olofGood night16:51
shorneolofk_: cool, Ill work on defining those20:54
--- Log closed Sun Jun 19 00:00:00 2016

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