| --- Log opened Fri Mar 11 00:00:29 2016 | ||
| -!- Netsplit *.net <-> *.split quits: rokka | 00:56 | |
| -!- Netsplit over, joins: rokka | 01:03 | |
| mithro | So, are there instructions somewhere on how to build a recent GCC for targeting or1k? - I'm looking at http://opencores.org/or1k/OpenRISC_GNU_tool_chain -- Is http://openrisc.io/newlib/building.html better? | 01:49 |
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| -!- Netsplit *.net <-> *.split quits: rokka | 02:10 | |
| -!- Netsplit over, joins: rokka | 02:21 | |
| -!- hansfbaier is now known as 92AAAI8WC | 02:23 | |
| -!- Netsplit *.net <-> *.split quits: rokka | 02:47 | |
| -!- Netsplit over, joins: rokka | 02:54 | |
| shorne | stekern: omg, your idea about the sdram was spot on | 04:28 |
| shorne | I changed 2 setting, 1 switch clk param to 50 (actual clock is 100 but to allow 32ms refresh), just put cas to 3 to be safe | 04:29 |
| shorne | 2 set cas to 3 | 04:30 |
| shorne | it boots like a charm now | 04:30 |
| stekern | cool | 04:30 |
| stekern | I was actually referring to some lower level parameters, but relaxing at that level ofc works too | 04:31 |
| shorne | I see, I was booting the old image which was giving serial output and it was dumping stacks, and some of the data just seemed wrong. So it was leading me more towards a memory issue | 04:33 |
| shorne | trying my 4.5 image now | 04:33 |
| stekern | https://github.com/openrisc/orpsoc-cores/blob/master/systems/de0_nano/backend/rtl/verilog/pll.v | 04:33 |
| stekern | you can play with the phase settings in that | 04:33 |
| stekern | just open it in the megawizard in quartus | 04:34 |
| stekern | I think we slightly tuned them before because someone saw some issues | 04:34 |
| shorne | oh, the pll settings, I think it should be ok, I wrote an sdram controller for this board a few months ago | 04:34 |
| shorne | had it ad same phase and 133Mhz with no issue | 04:34 |
| shorne | but it was running 32ms refresh | 04:34 |
| stekern | ok | 04:34 |
| shorne | I noticed the wb_sdram_cntrl seems to hardcode to 64ms | 04:35 |
| stekern | feel free to post a patch that makes it a parameter ;) | 04:35 |
| stekern | I wrote wb_sdram_ctrl against the spec for the memory on the de0_nano iirc though | 04:36 |
| shorne | yeah, the spec sheet has 2 grades A1 and A2, one has 64 one 32 | 04:37 |
| shorne | for some reason I set to 32 when I wrote mine | 04:37 |
| shorne | I think I found it was the lower grade, not sure | 04:38 |
| stekern | oh... perhaps they actually changed the chips on the newer boards to lower grade then? | 04:38 |
| shorne | maybe | 04:39 |
| stekern | I can't remember anything about different grades back when I wrote it, but it was a "while" ago, so that doesn't really mean anything | 04:39 |
| shorne | Ill submit a patch for the sdram controller | 04:47 |
| shorne | any testing you do other than the bench in the core? | 04:47 |
| shorne | Also, I might as well submit a patch to bring linux up to 4.5 | 04:48 |
| shorne | but that wasn't very hard | 04:48 |
| shorne | just git merge | 04:48 |
| shorne | now time for some fun.. https://www.instagram.com/p/BCzv8OSQnlY/ | 05:00 |
| stekern | yeah, I've been syncing the tree sporadically, usually any conflicts are very straight forward | 06:35 |
| stekern | I can sync it to 4.5, especially since I have a board setup to test on now | 06:35 |
| stekern | (and fix the bug that I noticed the other day at the same time) | 06:36 |
| mithro | stekern / shorne: What does "linux on OpenRISC" actually give you these days? | 06:39 |
| mithro | IE What type of peripherals are supported? (If anything more then a UART?) | 06:40 |
| stekern | spi/i2c/framebuffer/ethernet etc | 06:41 |
| mithro | stekern: cool, framebuffer+ethernet are supported on which devboards? The Atlys? | 06:44 |
| stekern | yes | 06:45 |
| mithro | Any others? It sounded like shorne was working on a DE0 Nano? | 06:46 |
| shorne | mithro: I am on de0 nano, it supports spi/i2c/flash | 07:03 |
| shorne | there are also gpios | 07:04 |
| shorne | I have a dac circuit hooked up to my de0 nano, I have been working on getting it up to I could write a simple sound card | 07:04 |
| shorne | I notice there is an ac97 core in opencores, so I might start with that | 07:05 |
| shorne | *I have been working on getting linux up so I can write ...* | 07:05 |
| shorne | I bet you could get a frame buffer on de0 nano using the gpio pins, not sure how many LEs the current SOC is using though | 07:08 |
| shorne | Total logic elements : 10,789 / 22,320 ( 48 % ) | 07:08 |
| shorne | plenty of room left | 07:09 |
| mithro | I have an Atlys board, so guess it easier to use that | 07:10 |
| shorne | yeah | 07:11 |
| mithro | Anyone have the time that if I send them a Opsis board (which is pretty similar to the Atlys board) they would get it working on FuseSoC? | 07:14 |
| _franck__ | mithro: ethernet+frame buffer are also supported on Altera NEEK board | 07:25 |
| stekern | shorne: I have a lot of cruft attached to my de0_nano: http://1drv.ms/1DoMitW | 07:32 |
| shorne | stekern: cool, vga, ps/2?, several serial, sdcard | 07:36 |
| stekern | and sound | 07:37 |
| shorne | I see, thats the bottom right, how are you driving it? do you have an ADC? or just doing PWM? | 07:38 |
| stekern | it's not serial though, it's atari joystick (aka TAC-2) interface | 07:38 |
| stekern | it's just a RC filter on one pin | 07:39 |
| stekern | https://github.com/skristiansson/minimig-de1/blob/master/fpga/de0_nano/extension_board.txt | 07:39 |
| stekern | "documentation" of the extensions | 07:39 |
| shorne | My first project was pwm https://github.com/stffrdhrn/beeper | 07:40 |
| shorne | Well, one of the first | 07:41 |
| shorne | then I bought and ADC, basically spi interface | 07:41 |
| shorne | https://github.com/stffrdhrn/adc_interface | 07:41 |
| shorne | Then I wrote and sdram controller https://github.com/stffrdhrn/sdram-controller | 07:42 |
| stekern | I think minimig (which I used the extensions for) is using a sigma-delta converter | 07:42 |
| shorne | ah. I meant dac, I bought dac, the adc is on the board | 07:43 |
| shorne | I made a littled sound recorder, preamp -> adc -> sdram -> dac -> amp -> speaker | 07:43 |
| stekern | nice ;) | 07:44 |
| shorne | trying to just use all the parts of the board | 07:44 |
| shorne | but my code is all very minimal | 07:44 |
| shorne | A friend of mine is making a few minimigs | 07:48 |
| shorne | its cool what you can do with some resister ladders and rc filters | 07:49 |
| shorne | stekern: how much more fpga space is needed for SMP? | 08:03 |
| shorne | just about 1 more core? or is there an apic needed as well? | 08:04 |
| stekern | can't remember, but I've run a 4 core version on de0-nano at least | 08:04 |
| stekern | or was it only dual... | 08:04 |
| stekern | anyway, I've tested smp on de0_nano, so it is definitely possible | 08:05 |
| shorne | ok | 08:05 |
| shorne | good to know | 08:05 |
| shorne | are you working on anything specifically now? | 08:05 |
| stekern | I haven't had much time for hobby-projects lately, unfortunately | 08:11 |
| shorne | me too, but just need to get my mind off work lately | 08:12 |
| wallento | shorne: I think there is no apic, but all irqs connected to one core | 11:46 |
| stekern | wallento: all interrupts where connected to all cores | 12:29 |
| stekern | but only one core has them masked | 12:30 |
| stekern | *were | 12:30 |
| stekern | you need a seperate (global) timer and a ipi core though | 12:31 |
| stekern | shorne: I have an (old) orpsoc-core branch with multicore support here: https://github.com/skristiansson/orpsoc-cores/tree/multicore | 12:32 |
| wallento | ah, right, thanks, stekern | 12:32 |
| wallento | I also have a de0-nano finally and want to get this stuff running again | 12:32 |
| wallento | and update our various tutorials.. | 12:33 |
| stekern | one thing we need is the gdb cheat sheet with latest info | 12:33 |
| stekern | I found myself struggling to remember how to even connect to openocd with it | 12:34 |
| shorne | stekern: I went through a lot of gdb commands to figure out what was going on | 17:03 |
| shorne | like | 17:03 |
| shorne | info reg dmmucfgr | 17:03 |
| shorne | info registers system | 17:03 |
| shorne | info reg dmmu | 17:04 |
| shorne | (to see the actual tlb dump) | 17:04 |
| shorne | I could put together a cheatsheet with example outputs | 17:05 |
| shorne | who approves accounts on opencores? | 19:06 |
| shorne | meaning the mediawiki | 19:07 |
| --- Log closed Sat Mar 12 00:00:30 2016 | ||
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