| --- Log opened Thu Sep 24 00:00:57 2015 | ||
| andrzejr | _franck_, do you know the sequence of TDI, TMS corresponding to the halt command? Couldn't get jtag_vpi to work so I need something with no dependencies on other software. I can see outputs of BSCANE2 toggling in HW when I issue the halt command but I do not get a response from adbg_top. | 07:32 |
|---|---|---|
| -!- orsonmmz|away is now known as orsonmmz | 07:33 | |
| andrzejr | my openocd script: http://pastebin.com/RQrsABVk | 07:40 |
| olofk | andrzejr: Would it help if I run a jtag_vpi test and provide you with some info? | 08:59 |
| maxpaln | olofk: Yes, away from ORPSOVv2 - although not entirely within Fusesoc either. That is my aim for this leg of work! | 09:03 |
| maxpaln | In reality all the simulations I run are working fine - which makes me think it is a synthesis thing (that, and the fact that I discovered a synthesis problem during the initial testing with the inferred MAC - I worked around it by manually inserting a multiplier from our library) | 09:04 |
| maxpaln | which is another problem - the version of MOR1KX I use has this additional code - is there a way to force a local copy of a file into the build? | 09:05 |
| maxpaln | If not, the standard checkout of MOR1KX will always have this problem until the synthesis problem is fixed! | 09:05 |
| olofk | maxpaln: For FuseSoC you can create a new directory, check out mor1kx there, put mor1kx.core there with the provider section deleted and add that directory to fusesoc.conf | 09:08 |
| olofk | Then it will use your local version of mor1kx | 09:08 |
| olofk | oh... you want to do it for a single file | 09:08 |
| olofk | That's not really supported by FuseSoC, but you can still use a local copy of mor1kx and manually keep that synced to upstream mor1kx with your changes | 09:09 |
| maxpaln | ok, that works - a local copy is fine for now. Waiting for Synopsys to fix synthesis bugs is a notoriously patient business. An interim solution is definitely needed but longer term I'd hope to be using the standard checkout... | 09:14 |
| maxpaln | If I get really keen I may also fix that remaining Wishbone BFM problem - the one where no byte-wide transactions are modelled. I remember losing around 3 days to diagnosing a bug that would have been found had I spent half a day implementing that!!!!! | 09:15 |
| olofk | maxpaln: Yes, that would be great. andrzejr had a bug with byte/halfword accesses just a while ago, so having the BFM test that is clearly useful | 09:18 |
| olofk | And waiting for synopsys to fix things is not that fun. Last time I reported a bug, I think the product was released a long time before they got around to fix the bug | 09:20 |
| olofk | The benefit of using open source tools | 09:20 |
| olofk | maxpaln: Talking about open source tools, do you know if Lattice has said anything about the open source ice40 toolchain? | 09:21 |
| maxpaln | I don't remember hearing anything about open source tools for iCE40 - do you know something I don't? ;-) | 11:11 |
| maxpaln | and yes, the new BFM is a big improvement on the old one but the lack of byte/half word support is a glaring ommision - all HW will almost certainly exercise the interface in this way so testing it in sim is really essential. I#ll try and find time in the next few weeks or so. | 11:12 |
| maxpaln | Actually, on the synthesis tools we are nearing the production release of our own internally developed synthesis enginer: LSE (no prizes for guessing what it stands for!) | 11:13 |
| andrzejr_ | maxpaln, had a similar problem with cadence - the support came up with a set of optimisations that producing correct results | 11:14 |
| maxpaln | This should make turnaround on bug fixes a lot quicker - its not quite as good at larger more complex designs at the moment though, so I am sticking with Synplify for now... | 11:14 |
| maxpaln | adrzejr: support from Cadence: impressive! | 11:14 |
| andrzejr_ | afair the problem was in RTL rewrite option combined with power optimisation flags. the symptom was a broken multiplier when some of the signals were truncated | 11:17 |
| andrzejr_ | as for byte/half-word access test - that would be great to have. I found several bugs already, some in my code, some in wb_interconn | 11:20 |
| andrzejr_ | also, it would be good to have a behavioural (or even rtl) bus monitor reporting transactions and errors | 11:23 |
| maxpaln | andrzejr: do you mean in HW or in Simulation? There is a monitor for MOR1KX that is excellent for tracking instructions etc. But I guess what you want is to attach something to a particular bus interface and monitor it - not necessarily on the CPU, right? | 12:21 |
| andrzejr_ | maxpaln, preferably both. in simulation for logging transactions and errors. in hw for counting them (debugging rare errors and performance issues) | 12:36 |
| maxpaln | Actually this shouldn't be too tricky. its largely a variant on the BFM code - but instead of issuing transactions and comparing memory contents, it just checks the bus signals for compliance to the spec. | 12:55 |
| maxpaln | Actually now I think about it - this could be a sizeable piece of work depending on how much of the spec is implemented. | 12:55 |
| maxpaln | But a relatively common subset of cycle types would straight forward enough - it could be made synthesizable too. The challenge is how to get the information out of the HW after a fatal error.... | 12:56 |
| andrzejr_ | in my sdram ctrl I'm planning to add a couple of counters (transactions and bytes) that can be read back by sw. but that's purely for performance monitoring and it doesn't distinguish between bus masters. | 13:54 |
| maxpaln | SO, I think my strategy is going to be to get my current project running inside fusesoc - simulation, HW build and all. I can then update all the relevant parts that have been updated since I last pulled them down. | 14:05 |
| maxpaln | I have a fusesoc checkout from around 9 months ago - I guess I should update that first. Then go about creating a new system etc. | 14:06 |
| maxpaln | within fusesoc how do you control what simulations are run? I'd like to run a set of CPU regressions on the MOR1KX - is that something that can be done within fusesoc? | 14:26 |
| maxpaln | I suppose more accurately, I want to get to the point where I can run some system level simulations that exercise and test the CPU within my ORPSOC build. I am guessing this is possible but being a newbie it isn't clear how to get to that point. I'll keep digging.... | 14:28 |
| maxpaln | hmmm, I decided to try 'fusesoc sim mor1kx-generic' - I figured that might get me closer to my target. I get an odd error though: | 14:33 |
| maxpaln | http://pastie.org/10441688 | 14:33 |
| maxpaln | I wonder if I have an out of date version of something.. I thought I had cleaned and update it all.... | 14:36 |
| maxpaln | I think that was it - I had an old set of files at /root/.cache/fusesoc - not sure what process checks these but I guess something assumed they were up to date. I deleted the lot and retried my 'fusesoc sim mor1kx-generic' command - it pulled down a new set and got further before erroring with a pretty opaque message about failing to build simulation model. | 14:40 |
| maxpaln | it seems I am missing libelf! | 14:42 |
| maxpaln | even more curious - elfutils-libelf is installed but gelf.h is proving elusive to the compiler.... why is it always my linux knowledge that befuddles me.... | 14:58 |
| andrzejr_ | a missing -dev package? | 15:01 |
| maxpaln | I was just thinking along those lines - libelf is installed but not libelf-dev | 15:01 |
| maxpaln | whoop - back in business! | 15:03 |
| olofk | maxpaln: Great to hear it works | 15:03 |
| olofk | The cache mechanism in FuseSoC is one of those thing I've intended to improve for several years now | 15:03 |
| olofk | Manually clearing out the cache is the best solution for now to get around strange errors | 15:04 |
| maxpaln | or at least I think so - it looks like the sim is running (top shows vvp running at ~100%) but the last thing printed to the screen is 'No ELF file specified' | 15:04 |
| maxpaln | guess i'll wait to see if it all runs ok | 15:04 |
| maxpaln | can the sim be made more verbose? | 15:04 |
| olofk | maxpaln: Try fusesoc sim mor1kx-generic --help | 15:05 |
| maxpaln | ah, the help is context sensitive - nice! | 15:05 |
| olofk | Yep. One of those less advertised features of fusesoc :) | 15:06 |
| olofk | So you probably want to load an elf file with --elf-load=/path/to/elf at least | 15:06 |
| olofk | What sim are you using btw? | 15:07 |
| maxpaln | I guess icarus - I haven't specified anything else | 15:08 |
| maxpaln | I wanted to try something that should definitely work - then build up | 15:09 |
| olofk | Just curious if you had seen the --sim=<simulator> parameter | 15:09 |
| maxpaln | I don't think I did - at least not in the helps I have seen so far. | 15:10 |
| maxpaln | I see modelsim is supported now - I have riviera which accepts modelsim commands. I will try that next but I suspect some of the command options will be different. | 15:10 |
| maxpaln | Is it a big deal to add support for a new simulator? | 15:10 |
| olofk | It's context sensitive, so you need to put the --help after the sim command, but before the system :) | 15:10 |
| olofk | Shouldn't be a big thing. andrzejr added support for Xilinx xsim and Isim that I haven't merged yet | 15:11 |
| maxpaln | I don't know python too well but it would be cool to have support built in for riviera (or active-hdl for that matter seeing as we ship a copy with Diamond. | 15:11 |
| olofk | I'd love to have support for more sims and Lattice tools | 15:11 |
| maxpaln | whereabouts should I start looking to add support for the new sim? Just give me a starting point and I'm sure I'll figure it out... | 15:12 |
| olofk | I've actually added support for icecube2, but haven't pushed it yet, since I haven't got any HW to test it with | 15:12 |
| maxpaln | BTW, how long should 'fusesoc sim mor1kx-generic' take? I have trace_enable and trace_to_screen enabled and am at '32500000.00 ns' so far... | 15:12 |
| maxpaln | ah, you should have said - which device? I am pretty certain we have some of those low cost boards in our office. | 15:13 |
| maxpaln | I guess you want something with a larger device - the biggest is an 8K LUT I think - | 15:13 |
| maxpaln | on this board | 15:13 |
| maxpaln | http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/iCE40HX8KBreakoutBoard.aspx | 15:14 |
| maxpaln | there's not much on the board - its designed to provide access to all the IO via headers. | 15:14 |
| olofk | maxpaln: I just did a small test design to test the toolchain. Think I actually managed to synth a minimal mor1kx for one of the 8k devices, but it was some time ago, so I might misremember | 15:14 |
| olofk | maxpaln: Simulation length depends on the elf you run I guess | 15:15 |
| maxpaln | I didn't specify an ELF - in fact this was one of the first messages 'No ELF Specified' although its run off the top of the screen. | 15:16 |
| maxpaln | Is there a default ELF or some default tests? | 15:16 |
| olofk | No default ELF | 15:16 |
| olofk | But we have a repo with som standard tests up now | 15:16 |
| olofk | github.com/openrisc/or1k-tests | 15:16 |
| olofk | (I think) | 15:16 |
| maxpaln | hmm, ok let me look | 15:17 |
| olofk | Hmm.. If I only could remember how to compile the damn test suite... stekern? :) | 15:18 |
| maxpaln | ok - so this is pretty different to last time I looked. What's the process for generating an ELF for fusesoc.. | 15:18 |
| maxpaln | (ah, ok - so we need stekern's help) :-) | 15:18 |
| olofk | maxpaln: Nothing special. Just gcc | 15:18 |
| olofk | I can provide you with a few elfs that you can test | 15:19 |
| maxpaln | well, that would be good - but I'd really like to try running a full mor1kx regression suite. So, I guess I'll have a look in the Makefile to see if there are clues... | 15:19 |
| olofk | https://www.dropbox.com/s/vvgnlu0pniva4n2/or1k-tests.tar.gz?dl=0 | 15:20 |
| olofk | I generally run or1k-basic for quick tests | 15:20 |
| olofk | Unfortunately it's not passing all tests in the suite since some of them depend on some peripheral mapped to a certain address, or that the memory should be of a certain size | 15:21 |
| olofk | It's more or less the old tests from orpsov2 and mor1kx_dev_env with some fixes applied | 15:21 |
| maxpaln | cool, this is looking a bit more familiar - the names at least... | 15:22 |
| olofk | If you want to run all the elf files with a script, I recommend that you pass --keep to fusesoc. That avoids rebuilding the simulation model prior to every run | 15:22 |
| olofk | Hungry baby. Must feed | 15:23 |
| maxpaln | :-) thanks - as always, much appreciated | 15:23 |
| maxpaln | if you'd like an iCE40 board BTW let me know - I'll have one shipped if we have a spare in our office. | 15:24 |
| olofk | Oh...tempting. I've never said no to hardware :) | 15:29 |
| maxpaln | hmmm curious - I am getting errors about undefined functions that should be defined in libelf as far as I can tell: | 15:33 |
| maxpaln | elf-loader.c:39: warning: implicit declaration of function ‘elf_getphdrnum’ | 15:33 |
| maxpaln | this causes: | 15:33 |
| maxpaln | vvp: symbol lookup error: ./elf-loader.vpi: undefined symbol: elf_getphdrnum | 15:34 |
| olofk | maxpaln: What's your libelf version? We had problems with 0.147 (or something like that) | 15:34 |
| maxpaln | curious... | 15:34 |
| maxpaln | hmmm, quite old if that was the version you had problems with... | 15:34 |
| maxpaln | elfutils-libelf-devel.x86_64 0.137-3.el5 installed | 15:34 |
| olofk | Jesus christ. Are you running on Eniac or something? | 15:35 |
| maxpaln | :-) | 15:35 |
| maxpaln | it is the one part of my IT setup that is pretty old. I have a pretty old linux VM. I have been meaning to setup a new one but as far as I can tell it will require the company to splash some cash, a tricky ask at the moment... | 15:36 |
| olofk | ahh | 15:37 |
| olofk | There's probably some way to get compile and use a newer version of that lib, but it's not part of my skillset | 15:37 |
| maxpaln | yeah, that is what I am thinking... | 15:37 |
| maxpaln | hmmm, yum isn't offering me anything newer - I wonder how painful it will actually be to manually install these. Diving in... | 15:39 |
| maxpaln | hmmm, it seems 0.137 is latest version officially listed for CentOS5... | 15:41 |
| olofk | Perhaps you just need to build the thing and set ld_library_path. Or find a new rpm | 15:41 |
| maxpaln | I'm straying from the path now... | 15:41 |
| olofk | The elf-loader is for parsing an elf file and preloading the RAM. There are other slightly more complicated ways to run programs | 15:46 |
| maxpaln | well, I am starting to think I should consider getting a newer Linux distribution on my VM. I see VirtualBox is a free tool instead of the purchased VM-Ware that our company issues. Does anyone have any experience? | 15:48 |
| maxpaln | its a ballache though - it will mean taking at least a day out to reinstall the tool chain and all the other dependancies.... | 15:49 |
| maxpaln | although I would be shiny and new tough #tempting | 15:49 |
| olofk | I use VirtualBox all the time. Works just fine for these kind of things. USB passthrough is usually good enough to program boards from inside the VM as well | 15:49 |
| maxpaln | ok - well it seems straight forward enough to get installed. Maybe I'll try this tomorrow as a background activity... | 15:50 |
| olofk | And the or1k gcc toolchain is available precompiled nowadays, so you hopefully don't have to do that at least | 15:50 |
| maxpaln | ah, that would be simpler - what about the LInux tool chain, IIRC there were two separate tool chains (or something like that) | 15:53 |
| olofk | wallento: Do you know ^ ? | 15:53 |
| olofk | Actually, to build linux itself, you use the newlib toolchain (which I know is available) | 15:55 |
| olofk | For building programs to run under linux you can use the uclibc or musl toolchains. I think the last one is preferred, but I don't know if they are available precompiled. Perhaps it's just as easy as taking a copy of mine | 15:55 |
| maxpaln | I don't mind recompiling stuff - if I have a new distribution of Linux it should be straight forward enough as the tools to get dependencies etc. will be very useable. Its more a case of knowing what to install. I wrote some notes when i did it last time - I'm just trying to find them... | 15:57 |
| maxpaln | ah, here we go: | 15:59 |
| maxpaln | http://opencores.org/or1k/OpenRISC_GNU_tool_chain | 15:59 |
| maxpaln | seems pretty up to date(ish) | 15:59 |
| olofk | Yeah, I put some effort into updating that a few months ago | 15:59 |
| maxpaln | it should get me going int eh right direction - I think I'll track all my steps and keep a guide. Seeing as i am installing Linux from scratch this should be a pretty good how-to guide. | 16:00 |
| olofk | Hey, that's cheating! Everyone is supposed to keep the instructions in their heads. No guides are allowed | 16:06 |
| -!- olofk_ is now known as olofk | 16:24 | |
| _franck__ | andrzejr: with this http://opencores.com/websvn,filedetails?repname=adv_debug_sys&path=%2Fadv_debug_sys%2Ftrunk%2FHardware%2Fadv_dbg_if%2Fdoc%2FAdvancedDebugInterface.pdf | 16:46 |
| _franck__ | and openocd source code you should find what you want | 16:46 |
| stekern | olofk: "stekern?" doesn't highlight in irssi | 18:32 |
| stekern | but it should just be to run 'make' in the native directory (if you didn't figure it out already) | 18:33 |
| olofk | stekern: I think the problem was that everything was already compiled | 18:44 |
| olofk | stekern? sucks! | 18:44 |
| stekern | that highlighted... | 18:46 |
| olofk | ohh... | 18:48 |
| olofk | ok, so now I've booked hotel too | 19:03 |
| stekern | which one? | 19:03 |
| olofk | Nash airport hotel | 19:04 |
| olofk | Was going to book at Ibis since a lot of other people seem to stay there, but I think they are out of rooms for thursday->friday | 19:04 |
| olofk | According to booking.com "shopping, lakes and museums" are three good reasons to visit Geneva. I somewhat suspect that I will see none of those | 19:05 |
| stekern | I still need to nail down which days I can be there | 19:08 |
| andrzejr | has anyone had problem displaying waveforms in ascii format in gtkwave? The waveform contents is a correct ascii string but when I switch on the ascii format I get rubbish. Also checked with bit reverse and right justify. | 20:18 |
| -!- orsonmmz is now known as orsonmmz|away | 20:47 | |
| andrzejr | _franck_, good news - I can simulate orpsoc+jtag+openocd+gdb, had to add a jtag tap simulation model (JTAG_SIME2 - for some reason no one seemed to use e.g. JTAG_SIM_SPARTAN6 before). | 21:22 |
| andrzejr | minor glitches in the tooling, for example "info spr sys" in gdb results in "invalid command name "readspr"" | 21:23 |
| andrzejr | bad news: other than adding the simulation model, no changes were required. So I still don't know what is happening in HW | 21:24 |
| andrzejr | BTW, in the simulation I can use BSCANE2's SEL and RESET outputs. But the simulation fails if I route DRCK to adbg_top instead of TCK. | 21:26 |
| andrzejr | One difference is that the simulation model uses IDCODE=0x03631093 and the actual chip 0x13631093 (version 1 instead of 0). | 21:58 |
| andrzejr | with slightly different connections (simulation still works) in HW I get: | 22:17 |
| andrzejr | Warn : CRC ERROR! Computed 0xdebb20e3, read CRC 0x00000000 | 22:17 |
| andrzejr | Error: Burst read failed | 22:17 |
| andrzejr | not sure if that's a step forward or back | 22:17 |
| andrzejr | yay, it works! there may be something wrong with synthesis, though. I'm pretty sure I tried this combination of connections between the tap and the adbg_top before. | 23:12 |
| --- Log closed Fri Sep 25 00:00:58 2015 | ||
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