IRC logs for #openrisc Wednesday, 2015-08-12

--- Log opened Wed Aug 12 00:00:56 2015
wallentols hey, it seems I entirely missed this:
wallentocan anyone elaborate on it?12:12
latifHi everyone,  I have been working on orpsoc-v2 and orpsoc-v3 (fusesoc) to learn how to add user created IP modules, how to use openrisc with linux, how to write drivers for user created IP modules etc for a while. (on atlys board with or1k toolchain)18:45
latif I still could not manage to boot v3 from spi flash although I tried many things. Yesterday, I saw there are some changes on V3 and I though that the changes are related for my booting problem also. Am I right?? If so, can someone share information with me about the changes?? Can we boot v3 from Spi flash rigth now?? (for atlys). And what kind of changes have been made?? Or, what is the real problem with v3 ??18:46
olofklatif: We really need to find a better way to debug what's going on here. There are currently way too many unknown issues20:10
olofkRemind me, have you tried putting something else in the bootrom, like a LED blinker or something like that?20:10
olofkThat way we would know if the bootrom mechanism works at all20:10
andrzejrolofk, I've found something strange in wb_mux. I have extended rom size (same as in Atlys system) to 512 bytes and it stopped matching addresses.21:33
olofkandrzejr: Did you also change this in wb_intercon.conf and regenerate the wb_intercon component?21:39
andrzejryes, actually change in wb_intercon.conf seems to trigger it21:39
olofkhmm.. is your base address 0xf0000100?21:40
olofk(or rather any address with one of the 9 least significant bits set to one)21:41
andrzejryes, and this actually is the problem21:41
andrzejr0x100 is removed by the mask21:41
olofkYes. I should make wb_intercon_gen warn about that.21:42
olofkI moved the base address to 0xf0000000 in some of the systems that I have updated recently.21:42
olofkThey should all be moved from 0xf0000100 to 0xf0000000. There's really no good reason for the ...0100 address21:43
olofkHave to go now21:44
andrzejrThanks, ttyl21:44
andrzejrI have a problem with mor1kx icache. Bus bursting works but cache does not (burst addresses are repeated: 0,4,8,4,8,c,8,c,10, etc.).22:30
andrzejrinside mor1kx_cache most signals are X's.22:30
andrzejrI mean, is cache+bursting (prefetch?) supposed to work? I noticed bus bursting was disabled in Atlys.22:43
--- Log closed Thu Aug 13 00:00:57 2015

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