IRC logs for #openrisc Friday, 2015-05-01

--- Log opened Fri May 01 00:00:30 2015
GeneralStupidokay :) I need some more informations :) is there a documentation for newlib / openrisc what C libraries i can use?07:04
olofkGeneralStupid: Not really. We have found some code that requires patches to be built on OpenRISC, but I think most of the stuff works07:05
olofkAt least under Linux07:05
olofkFor bare-metal wih newlib I'm less sure07:06
olofkGeneralStupid: Have you come across a particular lib that doesn't seem to work?07:07
GeneralStupidolofk: no im still at the beginning, i only compiled some printf stuff07:08
GeneralStupidi would like to know if there is any nice way to access leds or switches07:09
GeneralStupidi have some of them on my board (DE2)07:09
olofkWe generally map gpio to address 0x91000000, so if you do the same on your board you should be able to reuse one of our fancy led blinkers07:11
GeneralStupidi have for example led_r_pad_o connected in the pin plannet07:11
GeneralStupidiam more a vhdl guy but it looks like their not connected in the top level07:14
olofkGeneralStupid: Are you using FuseSoC?07:15
GeneralStupidolofk: yes07:15
olofkLet me know if you want me to take a look at the code. A de2 port would be a welcome addition07:16
GeneralStupidolofk: at the moment i just changed the pin planner, technically the DE1 and DE2 are nearly the same...07:16
GeneralStupidshould i paste the toplevel for you? I dont understand why there are some led outputs defined but never used07:18
GeneralStupidi just tell you how i understand the openrisc architecture: I have one WB Master and some WB Slaves. One of the slaves is GPIO, a 8 bit GPIO interface. So should i instantiate a second GPIO, and connect it to the bus, to use my LED's?07:21
olofkWhat is the first GPIO instance connected to?07:23
GeneralStupidthere are connected to gpio_io and i pin planned them to a pin header07:25
olofkYou could use those for the LEDs07:26
GeneralStupidok, but just for example, what if i wanted to use more? i have 64 GPIO pins 25 LEDs, 4 buttons, seven segment display, LCD and 18 Switches :)(07:28
olofkAh ok. Yes. Use separate instances for the other ones. Each gpio instance handles 8 bits07:29
olofkof course, no one is stopping you from creating a 32-bit version of the core07:30
GeneralStupidthats the normal way? because technically i need GPI and GPO and GPIO ? :-D07:30
GeneralStupidso in opensoc speach GPIO is one core?07:30
olofkYes to all questions07:31
olofkI usually remove the tristate buffers from the top-level to get GPI or GPO functionality07:32
olofkAs we usually use them to interface LEDs or switches, we only need one direction as you have noticed07:33
GeneralStupidnice. whats cleaner? i once learned that 4 8 bit things are more flexible then 1 32 bit07:33
GeneralStupidok i see it. Thats pretty clever designed, so you really can use the GPIO core for everything.07:34
GeneralStupiddo i waste wishbone capacity by only using 8 bits?07:34
olofkHere's an example of a GPIO core connected to four switches and only used as input
GeneralStupidthe wishbone address keeps the same?07:36
GeneralStupidok, i thought that would be more complex07:37
GeneralStupidiam new to verilog. i think {4'h, gpio_i} means  0000 0000 (last four '0' = button state)07:40
olofkGeneralStupid: It's concatenation (like "0000" & gpio_i in vhdl)07:42
olofkThere's only two registers in the gpio core so we only need a single address bit to select between them07:43
GeneralStupidah :) ok. Good. is it just limited to my FPGA how many slaves i connect?07:44
olofkAddress decoding logic will increase for more slaves, but I don't think that's a real problem07:46
GeneralStupidhow does addressing work?07:46
GeneralStupidi got it ok07:47
GeneralStupidin wb_intercon.vh?07:53
GeneralStupidthat thing is generated by wb_intercon_gen :/08:00
olofkYes. It's really boring to write these things by hand :)08:02
olofkYou have the input file to wb_intercon_gen located in data/wb_intercon.conf08:02
GeneralStupidAHH that board got 70 GPIO pins11:17
GeneralStupidI will put my de2 "design" into my github repo. I think you could then merge it easily?!11:18
GeneralStupidWhat is a good offset value. i mean, i dont really need such a big offset between the GPIOs right? (6bits)11:39
olofkAre you really really really sure you need to expose all of them as addressable GPIO? :)11:56
GeneralStupidolofk: i think it makes sense if i make a template?12:25
GeneralStupidOh, i see :) I dont need to because it could make sense if you want to use GPIO from an component?!12:26
latifolofk: when applied the changes you said to me, xilinix successfully generated bit file. Thank you so much for all..16:48
--- Log closed Sat May 02 00:00:31 2015

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