IRC logs for #openrisc Saturday, 2015-05-02

--- Log opened Sat May 02 00:00:31 2015
GeneralStupidolofk: the de2 port is working out of the box like it is right now.10:00
GeneralStupidolofk:  not spectacular but... maybe it helps some other people who just need an easy and free to use CPU10:07
olofkGeneralStupid: Great news. There have been a number of people looking for a de2 port actually11:11
olofkOh, just fucking great. Altera has removed support for Cyclone III in Quartus 14.0 so I can't build it11:15
olofk...or did I just skip installing the Cyclone III files11:15
olofkLooks like its both :(11:19
olofkAh, it's even cyclone II11:31
olofkSo 13.0 SP1 is the last supported version11:32
bandvigHello, all. I'm deep diving into cappuccino source code, particularly into LSU. I have got several preliminary observations.12:02
bandvig(1) LSU isn't pipelined. (2) Data cache is VIPT (Virtually Indexed and Physically Tagged). I suppose the same to instruction cache. Am I right?12:02
bandvigstekern: Is there difference (from a software support algorithms) between VIPT and PIPT caches?12:05
stekernit can be, but as long as you don't go cache size/way > pagesize you don't have to worry about it12:07
bandvigI suppose, the actual OpenRISC/Linux platform meet the condition :)12:09
GeneralStupidolofk:  no12:23
GeneralStupidolofk: and yes, iam using 13.0sp1 too12:23
stekernat least you can still download 13.0sp112:26
GeneralStupidyes but its stupid. I have to install both parallel.12:27
stekernI even have an old 12.1sp1 laying around12:27
GeneralStupidOkay, iam normally no baremetal guy... how can i access to the GPIO stuff in C?12:27
GeneralStupiddo i  have to address them manually?12:28
stekerncan't remember if there was something that only worked with that version, so I don't dare to remove it12:28
GeneralStupidstekern: and that is a bad thing i think. The newer version should also keep support for older boards.12:28
GeneralStupidwe have a lot of these boards lying around and we are a bit screwed now...12:29
stekernGeneralStupid: port direction is at 0x91000000 and logic level at 0x9100000112:29
stekernand 1 means out, and 0 means in12:30
stekernso to set all 8 ports to out: *((volatile uint8_t *)0x91000000) = 0xff;12:31
stekernand to set all outputs to 1: *((volatile uint8_t *)0x91000001) = 0xff;12:31
bandvigstekern: Am I right about that actual typical cache configuration doesn't require any special support VIPT cache in Linux?12:37
stekernyes, but you can easily calculate it12:38
stekernpagesize is 8kb12:38
stekernand sets*blocks shouldn't exceed that12:40
stekerni.e., typical settings are OPTION_DCACHE_BLOCK_WIDTH = 5 and OPTION_DCACHE_SET_WIDTH = 812:44
bandvigthanks, I've uderstood. Typically the cache way is exactly 8kb (13 bits address width).12:47
GeneralStupidstekern: Thank you13:14
GeneralStupidstekern: so i can do 0b01010101 to put every second LED to on? for example. And 0xff is out, 0x00 is in?13:22
GeneralStupidso iam able to configure every single port / bit different13:22
latifhi all15:08
latifolofk: I need your help again :)15:08
latifolofk: I am trying to do this tutorial... .. I think I am doing every thing correctly but at the end it is not working :(15:10
latifolofk:What I am doing is that I am trying to write the orpsoc.bit and a ledtest program to the SPI flash and then so whenever I power on the ATLYS it starts to boot it from SPI flash and light up the LEDs..15:13
latifolofk: ...It is the same as in the tutorial... I am following the same steps and makind generated all needed files and programing SPI flash with .mcs file successfully...but then nothing happens!!15:15
latifolofk: I know it is not an one -answered question but een so I am asking you: what could be the problem?? Or can you suggest me another tutorial?? I really want to see that I can do something with openrisc on FPGA..15:18
olofklatif: I think there are some people in here who have been booting images from SPI Flash on Atlys just a few weeks ago16:35
latifolofk: do you know how can I connect them who are doing something about booting from spi flash?? maybe you know their names or something else??18:28
latifolofk: is it possible to generate .mcs file by using fusesoc ??18:36
bandvigDid you modify your rom.v in according with "Fixing the bootrom code " section in ?18:57
latifbandvig: thank you for your interest... yes i did what is said on the link..19:16
bandviglatif: last chance: do ypu use latest version of orpsoc-cores with fusesoc? Old orpsoc-cores had got bug: the ROM's address width was smaller than required for spi boor rom.19:26
latifbandvig... i have tried with orpsocv219:57
latifI have tried it the tutorial on the link you have you mean they are not correct?? So, how can ı do it with v3??19:59
--- Log closed Sun May 03 00:00:33 2015

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