IRC logs for #openrisc Wednesday, 2015-02-18

--- Log opened Wed Feb 18 00:00:46 2015
stekernI just synced our gcc to 4.9.200:45
-!- rhythmx_ is now known as rhythmx01:04
olofkstekern: Awesome! We should get wallento to run some regression tests on that06:47
stekernaren't there some automatic trigger when new pushes are done?06:59
olofkAh.. I always forget how to find the page07:04
olofkBut I can't really figure out how to see what was built07:09
olofkHas anyone looked into Yocto for OpenRISC btw?07:16
wallentoolofk: the "Build Passing" badge leads to the jenkins07:42
wallentoit seems the build did not get triggered, I will check07:42
wallentoah, its still building, reason is that one of the virtual machines is incredibly slow07:44
wallentohave no idea why..07:44
jeremybennettolofk: Just taken delivery of a box of 400 (sorry went away to eat and sleep)08:27
jeremybennettolofk: Also just seen your email08:34
olofkjeremybennett: Cool. You got a new mail as well09:49
_franck_jeremybennett: where do I start looking when I get a Segmentation fault from verilator while building a model ?10:13
wallentoolofk: everything fine with the continuous integration10:16
_franck_jeremybennett: is Segmenation fault "normal" ? or should I fill a bug somewhere ?10:16
_franck_this the the backtrace:
_franck_wallento: any clue about this verilator problem ?10:17
wallentoI once had such an error and it turned out to be some verilog code that caused it. I think I just expressed the statement differently. But that doesn't really help you I suppose..10:18
wallentoI would try to narrow down the actual file10:18
wallentoand send a bug report including this file10:18
_franck_I'll try that. Anyone has ever verilate simple_spi ? stekern ?10:19
olofk_franck__: Same here. My problems with verilator has been becuase it failed to parse some verilog code. Don't know for your specific case though. Have you tried another version of verilator?10:20
jeremybennett_franck__: That sounds like a bug to me.  If it's reproducible, post it as a bug on the Verilator website.  From the backtrace it is happening in the very first pass, which suggests some language construct is not being handled properly in the parser.10:26
jeremybennettThe result is a corrupt abstract syntax tree, which leads to the SEGV.10:27
jeremybennettIf you have the GDB there, there should be a .gdbinit you can source, which will define pn and pnt commands to print an individual AST node and an AST tree respectively10:29
jeremybennettYou could look at the value of nodep in frame 0, and if it is non-null use pn nodep to look at what the node contains.10:30
rschmidlin_Hello guys, am I able to read special registers out of gdb? How?10:37
olofkrschmidlin_: Yes you can, but I can never remember the syntax. I'll check to IRC logs :)10:41
olofkrschmidlin_: I knew this was a good idea :)
_franck__jeremybennett: brb, lan is down at work :(10:53
rschmidlin_Olofk, I guess that's how you read the GPRS but not the SPRS11:07
olofkrschmidlin_: I think you can use register names like npc with the same command11:09
olofkDo you know that you can use OpenOCD directly for most of this btw? It's quite handy11:10
olofkJust start openocd, connect with telnet to port 4444 and you can run commands like "reg npc" to get the pc11:10
olofkI think most SPR registers are named according to the spec11:11
jeremybennettrschmidlin_: From memory I think there is a "spr" command in GDB.11:13
jeremybennettJust checked.  There is "spr" to write the SPR and "info spr" to read the SPR11:15
rschmidlin_Ahh thanks I already notices that spr sets11:23
rschmidlin_It worked thanks Jeremy11:25
wallentorschmidlin_: info spr <group> <index>12:34
_franck_in newer gdb it is "info registers <your_register_name>" or "info registers <group_name>"12:39
_franck_"maint print reggroups" if you want to show group names12:39
_franck_however, you need to use openocd as gdb server because it supports gdb target descriptors12:40
_franck_Program received signal SIGSEGV, Segmentation fault. 0x000000000049931c in AstNode::iterateAndNext (this=0x1, v=..., vup=0x0) at ../V3Ast.cpp:779 779    if (VL_UNLIKELY(nodep && !nodep->m_backp)) nodep->v3fatalSrc("iterateAndNext node has no back"); (gdb) print nodep $1 = (AstNode *) 0x112:40
_franck_I'll try to find where is the problem is source files12:41
_franck_jeremybennett: wallento : this is the offending code:
_franck_changed it to a more classic syntax:
_franck_now it works13:58
_franck_I didn't even know we could instantiate multiple modules like this...13:59
wallentonever saw something like this before14:06
wallentoyou may put it up as enhancement in verilator maybe14:06
sheridpstekern: yes I basing my design off of altor3215:10
sheridpolofk:  I got it to work by changing the boot vector to be 0x0, and modifying the linker/makefile so that it gets placed there15:11
sheridpI'm not sure what the advantage of having everything at 0x10000000 is15:11
Me1234_Orpsoc v2 does not work with mor1kx if I set the option in orpsoc_defines.v15:32
Me1234_Using newest mor1kx15:33
antgreenolofk: re: 16-bit bus -- I picked 16-bit because that's what all the memory I was interfacing with presented.15:34
Me1234_Linux jups to die(), orconf2013 timerled goes to board_exit()15:35
sheridpHi all, I found some weird behavior concerning the difference between a local and global variable in C on the altor32 processor16:38
sheridpif I declare unsigned char X = 0x00;  outside of main, and then modify inside of main, I'm not seeing the change during execution, but if it's declared inside of main, it works16:39
sheridpIt's been a while since I've done C coding, but is this normal?16:40
poke53281However, the varible is saved in another memory area, if you define is outside. But the behavior should be the same when you change the variable.16:45
sheridpYeah, I saw from the lst file that it is using a l.sw, to write back to the variable, so I'm not sure why it fails16:46
sheridpAny thoughts on verilator vs icarus:  My design works in icarus but when I put it on the FPGA (Xilinx) it doesn't work. Would simulating with verilator be more accurate to help find the problem?18:08
olofk_franck__: Never seen that syntax either. And in this case it only saves like 5 characters :)18:23
olofksheridp: verilator is a lot faster, but it works best for synchronous designs and you need to make sure that everything is synthesisable18:25
olofkMe1234_: Does it work with an older mor1kx? orpsocv2 hasn't seen a lot of love the last few years18:27
olofkantgreen: We generally present 32-bit wishbone interfaces towards memory controllers, so that would make it easier to reuse those. Another option would be to put the wishbone upsizer I wrote a while ago between mox125 and the peripherals18:29
olofkBut the upsizer isn't heavily tested, and costs a cycle of latency18:30
Me1234_olofk: How old mor1kx?18:39
Me1234_olofk: I think I will try to fix spi flash boot in ORPSOCv3.18:39
Me1234_olofk: Now I see, that it is a problem with spi controller.18:40
Me1234_olofk: sw/apps/spiflash hangs if a press s (status).18:41
Me1234_olofk: with ORPSOCv2 it works well.18:42
Me1234_olofk: sw/apps/spiflash is loaded into ORPSOCv3 by means of GDB and OpenOCD.18:42
olofkMe1234_: Sorry. Don't know how old mor1kx you would need. Just wondered if you had tested that19:12
olofkHaving it work for ORPSoCv3 (or whatever we want to call it) would be a better solution19:13
olofkCan we bypass Jonas and send Linux patches upstream, or do we need to assign a maintainer first?19:23
Me1234_olofk: mor1kx version cannot be determined, because it is not included in ORPSOCv219:24
Me1234_olofk: Did ORPSoCv2 exist in 2009?19:31
Me1234_I see that the spi controller core has changed a bit. I did not look long at diff, but I see that something has changed.19:34
Me1234_olofk: ORPSOCv2 spi controller released in 2002, ORPSOCv3 in, looks like 200419:50
Me1234_olofk: Here is the error:19:50
Me1234_> //               Revision 1.3  2003/01/09 16:47:59  rherveille19:50
Me1234_> //               Updated clkcnt size and decoding due to new SPR bit assignments.19:50
Me1234_> //               Revision 1.2  2003/01/07 13:29:52  rherveille19:50
Me1234_> //               Changed SPR bits coding.19:50
Me1234_olofk: new SPR bit assignments!!!19:51
Me1234_olofk: sw/drivers/simple-spi/include/simple-spi.h this will not work with ORPSOCv319:54
Me1234_olofk: It is used by sw/apps/spiflash19:54
Me1234_olofk: Is linux dirver also affected?20:01
Me1234_olofk: sw/drivers/simple-spi/include/simple-spi.h and simple_spi datasheet have different SPR bit mapping.20:08
Me1234_olofk: By the way, did the maintainer of anwser you?20:20
olofkMe1234_: It's a bit complicated. ORPSoCv2 made local copies of some cores from OpenCores and they were modified, but these changes were never upstreamed20:20
olofkSo for ORPSoCv3 I wanted to use the upstream versions instead, but this means that all ORPSoCv2 changes weren't copied20:21
olofkAnd ORPSoCv3 started in ~2011, not 200420:21
olofkIt's a bit worrying if there are extra registers added in the orpsocv2 version of simple-spi. We should check the kernel driver20:23
Me1234_olofk: My mistake I saw 2004-02-28 at the start of file, then there is a line $Log: not supported by cvs2svn.20:24
Me1234_olofk : fusesoc downloads cores from svn, so it must be 2009(last modification of simple-spi svn)20:25
olofkOh, was that modified in 2009? I would have guessed at latest 2004. Most of these cores haven't been touched in a very long time20:25
Me1234_ SVN Updated: Mar 13, 200920:26
Me1234_Name: simple_spi20:26
olofkLooking a bit closer, the modification from 2009 is a directory restructuring by the opencores maintainers. The latest code change was almost 11 years ago20:29
olofkstekern: Does mor1kx recover from a bus error? Say that I'm trying to write to a peripheral that doesn't exist, can I just handle that and keep running?20:48
sheridpolofk: I got the altor32 (cpu_lite version) working for the mojo board, though it it is not currently using fusesoc. If you're interested, I'll put the files up on github.21:42
--- Log closed Thu Feb 19 00:00:47 2015

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