IRC logs for #openrisc Thursday, 2015-02-19

--- Log opened Thu Feb 19 00:00:47 2015
stekernolofk: it might, but not completely nicely00:53
stekernit could/should be improved by implementing msync00:54
stekernthe problem is that stores are deferred, so you might have register contents not matching what you would expect at the pc that is reported as epcr00:56
stekerni.e. epcr is lying slightly, and reports the pc of the load/store and not the pc at the time of the bus error00:56
stekernapplying a l.msync should handle the problem, but unfortunately I haven't implemented that00:58
stekern... I think I'll set lk aside for a minu lk aside for a minute today and do that..00:59
olofkstekern: Haha. You do know that you can mask interrupts from me, right? ;)06:26
olofksheridp: Cool. I'm interested in seeing that. Would be good to have altor32 available in FuseSoC as well06:27
olofkstekern: I found a potential use case for recovering from bus errors. I want to flash a status LED with GPIO in a bootloader, but I don't want it to crash if GPIO isn't mapped to 0x9100000006:28
olofkSo I want to do a test read from 0x91000000 and if that fails, I just set a flag and don't try to access it any more06:29
stekernolofk: nope, you're nmi08:48
stekernyes, I figured you had a use case like that in mind, or to try to pronbe the bus for something08:49
stekernnow I'm having problems with the new or1k-headers in newlib has broke all the tests in or1k-tests08:50
stekernso I'm sed'ing through them to use the new spr header instead08:50
stekerntypical openrisc development, you start with one thing and when you touch the corner of that you notice everything else is falling apart ;)08:51
olofkI had to rewrite some stuff too for the new newlib08:58
olofkVDSO support sounds great. Haven't fully understood what it's for though09:24
stekernafaik, it's syscalls with less overhead09:28
olofkFound a very good post on stack overflow explaining the subject09:30
Me1234What can be the cause of Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000715:41
Me1234on or1200?15:41
Me1234Linux works ok on or1ksim15:41
Me1234I think that initramfs is built by wrong toolchain15:41
stekernMe1234: what initramfs are you using?16:19
Me1234stekern: From linux here I think, I need to use mor1kx or rebuild initramfs whti or32-linux toolchain.16:49
Me1234stekern: Do I understand right, that mor1kx has a bit different ISA?16:56
stekernit has atomic instructions, but those should be emulated by the kernel17:00
-!- _franck__ is now known as _franck_19:23
Me1234If I use ORPSoCv3 with old SPI core 0x00003840 in spi_core_data_avail ()19:31
Me1234I meant spiflash-program.elf also hangs.19:32
Me1234All the same, even if defines about SPI (always enabled) are removed (in verilog)19:41
Me1234[p,v,s,h] > s19:41
Me1234SPI core: 019:41
Me1234SPI slave select: 0x119:41
Me1234SPI slave info:19:41
Me1234And hangs.19:41
sheridpDoes anyone have suggestions / example code for a bootloader that loads an image over a uart?  Is das uboot a candidate for this?21:00
olofkMe1234: Can you read out any of the registers from the SPI core manually with the debugger?21:01
olofksheridp: U-boot is way too big for this. It will most likely use >100kB and your platform is pretty memory-constrained21:03
olofkI don't know if the Arduino bootloaders would be good for this. Haven't looked at them, but they probably do just what you're looking for21:03
olofkHas anyone compiled lynx or links for OpenRISC?21:14
poke53281olofk: Yes22:41
sheridpolofk:  Yes, after downloading the uboot source; I think it is overkill.  I will just write something simple23:10
--- Log closed Fri Feb 20 00:00:49 2015

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