IRC logs for #openrisc Sunday, 2015-02-01

--- Log opened Sun Feb 01 00:00:22 2015
-!- Netsplit *.net <-> *.split quits: LoneTech01:43
-!- Netsplit over, joins: LoneTech01:48
-!- Netsplit *.net <-> *.split quits: sfa_, arokux1, julzmb, heroux08:45
-!- heroux_ is now known as heroux08:45
-!- Netsplit over, joins: julzmb08:46
-!- ysangkok_ is now known as ysangkok10:29
olofkAnyone at FOSDEM btw?10:41
olofkAnyone here handy with mmap?13:37
knzolofk: perhaps I am15:04
rschmidlinHey guys, I am not able to synthesize mor1kx with ISE. Is it because some files are only System Verilog compliant?18:15
olofkknz: Well, let's give it a try :) I have a peripheral mapped to the address space that wants to read and write to another part of the address space (DMA). I'm thinking that I could mmap both the address space of the peripheral to read and write control/status registers, and the memory area just as would have done if I was running it without an OS. Will that work?19:30
olofkrschmidlin: I haven't had any problems with that. I built the Atlys port just a few days ago without any problems19:31
olofkrschmidlin: Can you paste the errors?19:31
rschmidlinThere were errors of localparams inside generates. Ise didn't like it.19:41
rschmidlinI could paste in a moment. The automatic system had some problems too. It was not able to set the project to my device. Well i have to go over my files to check of everything is alright. I just installed version 14.7.19:43
rschmidlin_The other problem with mor1kx-generic was due to r0 not being initialized at all. The implementation seems to rely on the fact that FPGA rams are always initialized to zero.19:46
olofkrschmidlin_: Ah right. True. I fixed the localparams inside generates locally here. Forgot about that19:51
olofkAnd I have local fixes for the register init problems as well. Never done a proper patch though :/19:51
rschmidlin_And I have this odd behavior with fusesoc and ise:
rschmidlin_olofk, I fixed that one too. I think the proper fix would be to fix assign r0 to zero.19:52
rschmidlin_I will be back in some minutes…19:53
olofkYeah, that error was weird19:53
rschmidlin_olofk, especially odd if you consider that I have exactly that configuration in the prj file.19:53
olofkAnd regarding r0, there has been a lot of discussion about that, and the conclusion is that it's software's responsibility to ensure that it is 019:53
olofkrschmidlin_: Can you open the project file that fusesoc creates in ISE?19:54
rschmidlin_olofk, well, then at least r0 has to be initialized to zero19:54
rschmidlin_olofk, I didnt try it19:54
rschmidlin_could you provide a patch for those localparam things?19:54
olofkSure. Just have to fire up another computer. Give me 15 minutes or so19:55
rschmidlin_and I had that odd clog2 missing in arbiter.v. When I include verilog_utils.vh, ISE seems to go completely crazy then.19:55
rschmidlin_olofk, yup, I’m back in a couple of minuts too19:55
olofkrschmidlin: Sorry, but you will get them later tonight20:14
knzolofk: of course I assume you have no iommu, so you really need the physical mappings not the virtual ones22:33
knzolofk: my reference in this situation is
knzin short it is likely you need to make a kernel module and play with __va/__pa and/or kiobufs22:38
knzalso possibly check
--- Log closed Mon Feb 02 00:00:23 2015

Generated by 2.15.2 by Marius Gedminas - find it at!