IRC logs for #openrisc Monday, 2013-10-14

--- Log opened Mon Oct 14 00:00:39 2013
stekern_franck_: yes, I know, you need that...05:25
stekernI'm a bit in split minds how to actually handle that in my cleaned up version that I will try to upstream05:29
stekernor endianness issues all together05:31
stekernbecause there are endian issues with the actual framebuffer as well05:31
stekernyou can handle that by config options that set a flag, the problem is that most applications seems to just ignore that05:34
stekernso basically just console will look right05:35
stekernand for the record:
stekern_franck_: what board are you playing with btw? sockit?05:43
olofkCould we just please replace mornings with some more sensible part of the day06:01
olofkThere's nothing good about them06:02
stekernmornings are great!06:03
olofkThey tend to wake me up. I don't like that06:03
stekernat least the moment when you have a freshly made cup of coffee in front of the computer and noone awake to disturb you06:03
olofkAhh... I forgot coffe. Sorry about that. BRB06:04
stekernah, no wonder you're grumpy...06:04
olofkAhhh! A brand new day is here. Full of adventures and things to discover06:07
olofkstekern: Did you manage to beat some sense into wb_bfm_master?06:07
stekernyes, I think the change we discussed yesterday was the right thing(tm)06:37
stekernseems to work fine so far at least06:37
olofkWhat slave are you using that expects the classic ack, btw?06:39
stekernmy synth07:04
stekernI could of course have used the burst mode with bustlength of 107:05
stekernbut that seemed unintuitive to use07:05
stekernand slaves don't expect acks, they generate them ;)07:08
olofkIn Soviet Russia, ack generates you07:14
_franck_stekern: I'm using my de1, I don't have enough RAM to play with my sockit :)07:35
stekernah, did that have a vga port?07:36
_franck_CONFIG_WISHBONE_BUS_BIG_ENDIAN is that defined somewhere ?07:36
stekernit's really sick that you need more than 4GB...07:37
stekernyes, I think so, but IIRC that config option is not upstream07:37
stekernthe whole problem boils down to that linux doesn't have a "native I/O endianess" notion07:38
_franck_anyway, this problem helped me findind a bug in openocd when you have more than one virtual JTAG node07:44
_franck_problems are often usefull07:45
olofkI got 99 useful, but the bitch ain't one07:48
hansfbaier_franck_: if you don't need your SocKit, send it over to me, I'll pay for shipping :)09:15
_franck_hansfbaier: one is not enough ?09:34
hansfbaier_franck_: Two are nice for playing with high speed transceivers ... :)09:35
rahthese here FPGA boards are pretty expensive10:42
rahhurry up, patents, and expire so these costs go down10:43
rahVirtex-5 LX FPGA ML501 Evaluation Platform10:45
rahmanufactured in 200910:45
rahstill costs $99510:45
hansfbaierrah: Xilinx is expensive10:45
rahhansfbaier: I can see :-)10:45
hansfbaierrah: Did you have a look at the SocKit? has many features of the expensive FPGAs and is cheap10:46
hansfbaier115k cells, high speed transceivers10:46
rahhansfbaier: which sockit?10:46
rahhansfbaier: do you mean the cyclone V board?10:47
hansfbaierrah: not the cyclone V starter kit, the sockit10:48
hansfbaierrah: cyclone v is like sockit, but without the ARM cores and fewer logic cells10:48
rahhansfbaier: right, it wasn't clear you were talking about altera dev boards10:49
rahhansfbaier: yes, I have seen it10:49
hansfbaierrah: FPGAs above that tend to be very pricey, and the software isn't free any more (costs big $$$)10:49
rahhansfbaier: but I don't really like it because (a) I don't really want a chip with an ARM core on it (kind of defeats the purpose of using a free CPU for me), and (b) all the interesting peripherals are attached to the ARM core and not the FPGA10:50
rahhansfbaier: of the xilinx boards, the "Cyclone V GX Starter Kit" attracts me more10:52
hansfbaierrah: You can access the ARM peripherals from the FPGA10:52
hansfbaierrah: Yes, but it has only 75k cells10:52
hansfbaierrah: you don't have to use the ARM cores if you don't want to10:52
rahhansfbaier: how do you "access" the ARM peripherals?10:52
hansfbaierrah: you can instantiate a bridge to the ARM system with Qsys, it's in the labs which come with the sockit10:53
rahhansfbaier: what kind of "bridge"?10:56
hansfbaierrah: AXI<->avalon10:56
hansfbaierbus bridge10:56
rahI presume those are the busses used by the FPGA and ARM cores?10:57
rahhansfbaier: do you have one of these boards?11:00
hansfbaierrah: the SocKit11:01
rahhansfbaier: yes11:01
rahhansfbaier: you have one?11:01
hansfbaierrah: yes11:01
rahhansfbaier: do you have to use Windows software to configure it?11:01
hansfbaierrah: I use Linux11:01
hansfbaierrah: the board configurator runs fine with wine11:02
rahI see11:02
hansfbaierrah: Quartus runs well under Linux11:02
hansfbaierrah: so, no.11:02
* rah counts software running under Wine as "Windows software" :-/11:06
rahregardless, it all seems to be proprietary :-/11:06
hansfbaierrah: But you don't have to have a Windows License11:06
hansfbaierrah: Then forget FPGAs11:06
rahhansfbaier: I've already come to terms, disappointing as it is, that the FPGA domain is dominated by proprietary technologies11:07
rahs/that the/with the fact that the/11:07
hansfbaierrah: You don't have to use the pin configurator. It's only a convenience tool. You can write the pin assignments by hand if you prefer.11:07
hansfbaierrah: Hardware world is very proprietary.11:07
rahindeed :-/11:07
hansfbaierrah: There is a heap on patents on FPGAs If you want something completely open source you have to wait 20 years or so till they all expire11:10
rahI know :-/11:10
hansfbaiers/heap on/heap of/11:10
rahhansfbaier: changing the subject, do you have orpsoc (v2 or v3) running on your sockit board?11:11
rahcool, thanks11:12
stekerneven though you can access the hps peripherals from the FPGA, the peripheral cores are boring closed source ones still11:54
stekernjust to make that clear11:54
rahno doubt :-/11:54
rahbut presumably cores which have free software drivers available in Linux?11:55
rahwell there's that at least :-)11:55
stekernmy synth is starting to make some noise:
stekernjust simulated noise, but still ;)12:06
olofkLooking good12:16
stekernknowing that I will have a CPU handling a lot of the tasks made this implementation a lot more cleaner than the previous one12:16
olofkI wanted to play with my Korg Monotron a few days ago, but that thing is so damn small that I couldn't find it. Everything is not better when it's smaller12:17
stekern+ it will be possible to make use of some features that were crippled in the old implementation, just because it was hard to control it with rtl code12:18
olofkI've seen insane RTL code in some projects that just screamed to be replaced with a CPU, but no one had thought about it.12:19
stekernlike seperately modulating the velocity of seperate voices12:19
olofkDo you have a schematic of the synth?12:20
olofkAnd how do you control it?12:20
stekernthere's a whole bunch of that in my first synth. but it was by design. 1) a cpu wouldn't fit in the small avnet board I used then 2) I used that project to dust of rtl coding skills, so I tried to avoid to "cheat"12:21
stekernof the first synth?12:21
stekernthe old you control with midi12:21
stekernthe new has a shiny wb interface12:22
olofkSo I can use gdb instead of a claviature? :)12:22
stekernso the idea is that I'll have an or1k sitting and doing the boring tasks of parsing midi messages, doing LFO modulation of amplitude and frequency, voice to note assignment etc12:23
stekernhaha, yes, you could play it through gdb12:23
olofkYeah, that's how it should be done. No use in wasting logic resources on slow changing stuff that can be done in sw12:23
stekernI plan to drop it in the sockit and let the or1k be a pure "baremetal" machine, then expose some kind of midi interface towards the arm core, and then write a midi<->usb driver so you can hook it up to the computer12:25
stekernthe midi interface should be generic enough, so it would be easy to hook up an uart to it and use normal midi on some other board12:27
olofkGood idea. You could probably run a small linux with jack and some more stuff to have it portable12:27
stekernit's also nice to finally actually be in the progress of using openrisc for something, not just hacking on it ;)12:37
stekerninteresting article, but with the worst headline ever12:51
rahyeah I can't disagree with that12:54
olofkStill pouring in tweets about jor1k after the Phoronix and Slashdot articles. I'm still a bit jealous though that no one is impressed with our CPU implemented in hardware ;)13:19
olofkAha! I got it! Let's implement asm.js in verilog13:20
stekernyeah, I guess we will get the recognition when we can run a browser which can run jor1k on a hardware implementation ;)13:21
olofkWe should start by porting Icarus to OpenRISC13:22
stekerncompiling or1ksim for it might be simpler13:23
stekernbut not as groundbreaking ;)13:24
olofkI haven't been following the X and wayland compiling in detail. Is it complicated to cross-compile stuff with a lot of inter-dependencies?13:25
stekernI wonder if or1k will keep up if I let that do the envelopes too..13:25
olofkstekern: You can just add another one13:25
olofkOr implement the Vector instruction set parts :)13:25
stekernlooking at my old code, it qualifies as "insane code that yells to be handled by a cpu"13:26
stekernbut it's pretty time critical stuff13:26
olofkPut in a little extra pronto-espresso for that13:27
stekernI think I will think about ways to just let the or1k set a "timer" that will scale the velocity/frequency13:28
stekernbecause that's basically what the insane code does13:28
olofkThat's insane!13:28
stekernI could have interrupts triggering when there's a timeout too...13:29
stekernor something like that13:29
olofk211 views of my blog during the last month. I hope that google's servers can keep up with that13:30
stekernthat's 211 more than my blog have received13:30
olofkI liked your post "Parkerad hos Loopia". It was an interesting read13:32
stekernthanks, i put a lot of effort into that14:36
jeremybennettstekern: Where is your blog?14:36
stekernjeremybennett: i don't have one, that's how ican be so sure that it hasn't received any views14:39
stekern"parkerad hos loopia" means "parked by loopia" and loopia is a hosting service in sweden14:42
stekernit happens to be the hosting service i use, i don't know if olofk lucky-guessed that or actually looked it up ;)14:44
jeremybennettstekern: Ah - rather got lost in translation.15:10
nvmindhello all15:43
nvmindI have found the problem that was causing me the CRC errors.15:44
nvmindthe issue was that the memory of the register file of or1200 was not yet initialized when I was connecting to the simulation with openocd15:51
nvmindand the CRC computation was wrong due to the X value contained in it.15:52
_franck_nvmind: I had this problem too17:42
--- Log closed Tue Oct 15 00:00:40 2013

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