--- Log opened Fri Apr 26 00:00:32 2013 | ||
hno | stekern, any luck trying or1200? | 06:20 |
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hno | how do you build or1200 for de0 nano? I don't find it's board suport files. | 06:34 |
hno | aha, you have a git repository for orpsoc with de0 nano support. | 06:40 |
hno | and a bit of other changes as well. | 06:52 |
stekern | hno: sorry, had a crazy evening yesterday, didn't get around to test it | 07:11 |
stekern | I could test on an atlys board right now if it gives you any comfort ;) | 07:15 |
hno | I guess that uses another arbitrer and sdram controller? | 07:23 |
stekern | yep | 07:24 |
stekern | or, same arbiter, but different memory controller | 07:24 |
stekern | but that's the case between de0-nano and ordb2a as well | 07:25 |
stekern | hno: Jonas tree boots fine on the atlys board at leas | 07:30 |
stekern | that was with the simplified kernel config though, let me see with the config you mentioned yesterday | 07:31 |
hno | how much do de0 nano and ordb2a actually differ? Seems very similar in terms of specifications. | 07:38 |
hno | apart from slightly different I/O. | 07:39 |
stekern | different memory and ordb2a has ethernet, that' | 07:41 |
stekern | s about it I think | 07:41 |
hno | What memory do the de0 have? | 07:41 |
stekern | I hit a warning with the config you mentioned yesterday, but apart from that it boots up | 07:42 |
stekern | hno: it has 32mb of 16-bit SDRAM | 07:44 |
hno | in what way do the memory differ then? | 07:49 |
stekern | ah, I thought there was a different memory on that | 07:50 |
stekern | sorry about the confusion | 07:50 |
stekern | de0-nano and that board still have different memory controllers | 07:51 |
hno | yes | 07:52 |
mor1kx | [mor1kx] skristiansson pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/c6e27327a49cd95622640886a653c6a552aeccf4 | 08:06 |
mor1kx | mor1kx/master c6e2732 Stefan Kristiansson: icache: (temporary) disable out of refill cacheline accesses.... | 08:06 |
stekern | ^ bandaid for the regression on the atlys board | 08:06 |
hno | the arbiter does differ a bit as well. | 08:12 |
hno | a bit more than expected. | 08:12 |
hno | ee71ffe3159ced7098ecb4c85950c68a336fa720 | 08:14 |
stekern | hno: I wouldn't be concerned about that in regard to your problem | 08:35 |
stekern | I didn't have that applied when I booted 3.8 on de0 with mor1kx the other day | 08:35 |
stekern | and 3.4 have worked fine without that too | 08:36 |
stekern | 3.4 on or1200 that is | 08:36 |
stekern | you can of course apply it and test if it makes a difference | 08:37 |
hno | Hm.. tried to merge with your tree but for some reason it now tries to include the vga_lcd module, and fails. | 08:48 |
stekern | ah, yeah I see why | 08:50 |
hno | Error (10170): Verilog HDL syntax error at vga_csm_pb.v(141) near text "do"; expecting an identifier ("do" is a reserved keyword ) File: /home/henrik/SRC/orsoc/orpsocv2/rtl/verilog/vga_lcd/vga_csm_pb.v Line: 141 | 08:50 |
hno | after adding missing vga_defines.v | 08:51 |
stekern | quick and dirty fix, remove the vga_lcd directory | 08:51 |
hno | what would the proper fix consist of? | 08:51 |
stekern | no idea without looking closer | 08:52 |
stekern | "I see why" was only to "it now tries to include the vga_lcd...", not the "and fails" | 08:53 |
hno | still trying to learn the basics of how things fits together. | 08:53 |
hno | does it always build all modules even if not needed by the target board? | 08:53 |
stekern | yes, all that are in the root rtl/verilog and under the board/xxx/rtl/verilog directories | 08:54 |
hno | ok. | 08:54 |
stekern | they are only compiled though | 08:56 |
hno | ok. and the error is quite self explanatory, just need to replace do with another name for the signal. | 08:56 |
stekern | not sure why it chokes on that for you though, my quartus is all happy about it | 08:56 |
hno | which version do you have? | 08:56 |
stekern | 12.1sp1 | 08:57 |
hno | and mine is 12.1 (no sp1 yet). | 08:57 |
stekern | also worked in 11.0sp1 | 08:57 |
hno | don't know. | 08:58 |
hno | oh, it got to placement now. | 08:58 |
stekern | no, it was a statement: "it also worked in 11.0sp1" | 08:58 |
hno | Yes, I understood that. | 08:59 |
stekern | aha, I misunderstood you then =P | 08:59 |
hno | I meant that I then do not know why it works for you but not for me and have no further ideas on what might be the reason. | 08:59 |
stekern | yeah, got that now | 08:59 |
hno | I guess that a different sdram controller is likely making a difference for the bus error problem I am seeing. | 09:01 |
stekern | probably | 09:01 |
stekern | what's your sequence when you load with gdb though? | 09:02 |
hno | 1. program the FPGA. | 09:02 |
hno | 2. gdb vmlinux, then load. | 09:03 |
hno | 3. sys spr 100 | 09:03 |
hno | 4. continue | 09:03 |
hno | spr npc 100 I meant. | 09:03 |
hno | works great for both u-boot & linux-3.1. | 09:04 |
stekern | that should work, it's usually best to reset the board before loading linux | 09:04 |
stekern | you could always test with the de0 nano memory controller if you suspect that's what's failing | 09:06 |
hno | Yes, was thinking of that. Hence the questions on what memory the de0 actually have. | 09:07 |
stekern | should pretty much just be to copy the wb_sdram_ctrl directory and copy-paste the module instansiation in orpsoc_top.v | 09:07 |
hno | 3.8 booted fine now. | 09:08 |
hno | stekern, there is a numer of other or1200 fixes in svn that is missing in your git repo. | 09:10 |
stekern | I know, I haven't synced against svn in a while... | 09:13 |
hno | now the question is, did the problem get fixed by the arbiter fix, or bu some other change in your orpsoc repo... | 09:14 |
stekern | heh | 09:15 |
stekern | you should have tried without merging the arbiter fix first | 09:15 |
hno | nah, wantet to try with something close to what you say works today for you first. Easy to bisect which change is the importan one later. | 09:16 |
hno | if needed. | 09:17 |
hno | PING www.sunet.se (192.36.171.156): 56 data bytes | 09:18 |
hno | 64 bytes from 192.36.171.156: seq=0 ttl=57 time=24.949 ms | 09:18 |
hno | :) | 09:18 |
stekern | nice | 09:18 |
hno | A diff says that it must have been the arbiter fix. There is no other changes now in the merged tree, only board changes | 09:29 |
hno | Do you know of there is some email discussion or bug entry for the arbiter fix? | 09:31 |
stekern | no, just juliusb noticed it when playing with mor1kx on de0 nano | 09:33 |
stekern | so I pulled that patch out of mor1kx-devenv into my orpsocv2 repo | 09:34 |
stekern | the fix is a bit of a performance killer though | 09:34 |
stekern | alternative quick fix is to remove the _r sel signals, but that (might) create comb-loops | 09:35 |
stekern | the right thing would be to do a proper arbiter instead | 09:36 |
stekern | even with a simple round robin scheme | 09:36 |
olofk | I guess we soon can assume at least partial system verilog support in all the tools we use. That makes it a thousand times easier to write a more generic arbiter | 10:27 |
stekern | apart from the obvious thing with lack of multi-dimensional array port declarations, what else makes it hard? | 10:29 |
olofk | You just nailed it ;) | 10:29 |
olofk | Although records would be nice too of course, but not critical | 10:30 |
stekern | something close to this would probably suffice: http://git.openrisc.net/cgit.cgi/stefan/orpsoc/tree/boards/altera/de0_nano/rtl/verilog/wb_sdram_ctrl/arbiter.v | 10:34 |
olofk | Yeah, that's a lot better | 10:36 |
olofk | It's a single slave port, right? | 10:36 |
stekern | it's for the sdram controller, it arbiters between master accesses | 10:40 |
olofk | I did something similar for orpsocv3, but strictly priority based instead of round robin | 10:43 |
olofk | There's a separate demux too, for single master, multi slaves | 10:43 |
olofk | http://git.opencores.org/?a=tree&p=orpsoc&h=9ba3f1b4ba58c2d393731eb734a978ac5093a64f&hb=19dd245082de035e25f48e64108e70f5f865bc56&f=cores/wb_utils | 10:43 |
olofk | Your URL looks a lot better than mine :( | 10:44 |
stekern | nah | 10:46 |
stekern | hmm, can you just yank away the control from another master like that? | 10:52 |
stekern | or am I completely misreading the code? | 10:53 |
olofk | ehhm.. I haven't like... ehhmm... tested it very much | 10:53 |
stekern | ah, sorry, it's combinatorial | 10:53 |
olofk | Are you looking at the mux or the arbiter, btw? | 10:54 |
stekern | the question remains still though | 10:54 |
stekern | I'm looking at the wb_arbiter.v | 10:54 |
olofk | You're right. There's no logic to check if cycles are properly finished | 10:55 |
olofk | I think it worked in my case since it was only used with the debug if and the cpu, and the cpu was stalled | 10:57 |
stekern | yeah, it's probably fine between those two | 11:26 |
mor1kx | [mor1kx] skristiansson pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/20bc31a5d0dffa64a7fb0e5ab5c8ac02eb7d1369 | 12:32 |
mor1kx | mor1kx/master 20bc31a Olof Kindgren: Exclude gpr accessor functions from synthesis... | 12:32 |
andresjk | stekern, it's there any documentation on the mor1kxx? I have found nothing... regarding the specs, motivation and difference between the or1200 arch | 15:49 |
stekern | andresjk: all 'official' documentation is in the doc/ directory | 17:01 |
stekern | a lot of the information you are asking about was handled in juliusbs talk at the openrisc conference though | 17:02 |
andresjk | nice, I will check it out. ty | 17:03 |
stekern | http://opencores.org/or1k/OpenRISC_Project_Meeting <- slides and video available there | 17:03 |
andresjk | thanks | 17:04 |
hno | How hard is it so switch an orpsoc design between or1200 and mor1kx? | 17:10 |
hno | still haven't grasped even the basics of how things pulls together, but feeling brave after getting that arbiter issue fixed :) | 17:14 |
hno | I know stuff needs to be done in orpsoc_top.v, but what else? | 17:15 |
stekern | hno: not much else | 17:19 |
stekern | there's an example of how it can be done in my git repo and in the mor1kx-devenv | 17:20 |
hno | your de0 nano? | 17:36 |
stekern | yup | 17:37 |
hno | thanks. I see it. | 17:38 |
--- Log closed Sat Apr 27 00:00:33 2013 |
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