--- Log opened Wed Apr 10 00:00:08 2013 | ||
stekern | olofk: I registered to the workshop now, feel free to start pestering after 2013-06-11 ;) | 06:10 |
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olofk | stekern: Awesome | 06:10 |
stekern | devboards, gotta catch 'em all! | 06:11 |
olofk | haha | 06:11 |
olofk | We can always pretend that we are building a supercomputer cluster | 06:12 |
stekern | yup | 06:14 |
stekern | $269 for that board isn't bad neither (if that will be the selling price, it's just "valued at" at the moment), it could get some spreadage I think | 06:18 |
stekern | a cool openrisc demo on those boards with "silicon heaters" would be to do something realtime critical in the fpga using openrisc and one of the RTOS ports we have and do gui stuff on the arm | 06:29 |
stekern | that kind of chips seem to get some traction nowadays, e.g. cortex-a9 + cortex-m4 in the freescale vybrid chips: http://www.freescale.com/webapp/sps/site/taxonomy.jsp?code=VYBRID_FSERIES | 06:33 |
stekern | sorry, cortex-a5 | 06:37 |
jemarch | morning! | 07:18 |
stekern | sometimes there are some very useful info on the opencores forums: http://opencores.org/forum,OpenRISC,0,5024 | 08:48 |
stekern | you just have to dig through the "PLZ EMAIL ME TEH CODEZ" ;) | 08:51 |
stekern | mor1kx together with 100 MHz sdram clock (instead of 50 MHz) on de0 nano works just fine after I did what he suggested | 08:52 |
@juliusb | that's pretty cool! | 09:06 |
@juliusb | so is mor1kx at 100MHz or just the SDRAM clock? | 09:08 |
stekern | just the SDRAM clock | 09:13 |
stekern | mor1kx is at 50 MHz | 09:13 |
stekern | I'm doing micro optimisations atm ;) | 09:14 |
stekern | it's a pretty useful excersise, looking at the code and really think about what it will be in term of gates | 09:15 |
stekern | exercise too | 09:16 |
stekern | made me find this gem of mine: https://github.com/openrisc/mor1kx/commit/5daf75927003c2baff4afbd3354feeecd96c34f4 | 09:17 |
stekern | I had just added more and more muxes to your original 'op_alu_i ? alu_valid_i : 1'b1;' | 09:18 |
_franck_ | stekern: http://www.altera.com.cn/literature/hb/nios2/n2cpu_nii51005.pdf, "Clock, PLL and Timing Considerations" | 09:18 |
_franck_ | I had this kind of problem on a custom board | 09:18 |
stekern | until it became unreadable and inefficient :/ | 09:19 |
@juliusb | stekern: spring cleaning, huh? :) | 09:21 |
@juliusb | I should do some, too. | 09:21 |
stekern | _franck_: thanks, yeah, you probably have to do that, trim the offset for your board | 09:22 |
stekern | jeremybennett_: or1ksim question: can you *force* tracing off somehow? | 09:23 |
stekern | I have a linux image where I have a l.nop 8, so tracing will be turned on, but I want to run that image without tracing, but also without removing the l.nop 8 | 09:24 |
stekern | juliusb: yup, and I'm trying to simplify the comp_op logic, it's making a terrible path from register outputs to branc address throuh the flag generation | 09:31 |
stekern | since the ALU output is now connected combinatorially to the pc address | 09:33 |
stekern | you could of course stall on 'l.sfxx; l.bf' to get the registered output from execute, but that kind of would defeat the purpose of making the branches 1-cycle, since 'l.sfxx; l.bf' is *very* common | 09:36 |
stekern | more advanced solution: use the registered output from execute stage, but use a simple branch prediction on the conditional branches | 09:39 |
stekern | backwards branches always taken, forwards never | 09:39 |
stekern | that's probably what I should do, in the long run | 09:42 |
stekern | man, this IRC thing is pretty cool, you resolve problems just by telling other people about them =P | 09:43 |
jeremybennett_ | stekern: I thought tracing was turn on/off by a special l.nop? | 09:44 |
stekern | jeremybennett_: you are absolutely correct, it's turned on by 'l.nop 8' and turned off by 'l.nop 9', the problem I have is that I want to *prevent* the 'l.nop 8' from turning it on | 09:46 |
stekern | if that's not possible, it's not a big deal, I just thought you might know from the top of your head | 09:47 |
jeremybennett_ | stekern: Not something I had ever considered. I guess there is a case for an "--ignore-nop-<n>" argument. Would be a new function (easy to implement) | 10:13 |
stekern | yeah, that sounds good, and more generic than a "force tracing off" | 10:20 |
stekern | juliusb: how does this look to you? http://pastie.org/7420288 | 12:37 |
@juliusb | should be easier to read | 13:01 |
@juliusb | (I like how pastie does diff syntax highlighting!) | 13:01 |
@juliusb | it works the same? | 13:02 |
stekern | should work the same, if I haven't done any brain farts. The tests passes with it at least. | 13:07 |
stekern | and it generates slightly more lightweight logic | 13:08 |
stekern | if you want to reuse logic for the a_eq_b, we could do: !(|xor_result), but that slightly less obvious what it does | 13:10 |
stekern | and the synthesis tools might figure that out anyways | 13:11 |
@juliusb | oh great :) | 13:15 |
stekern | actually, it looks like quartus doesn't figure that out and the critical path through a_eq_b went away for another one | 13:15 |
@juliusb | i just figured out that the FPGA on the DE0 Nano costs 48 pounds each on digikey.co.uk, and I could buy the board for 69 pounds | 13:15 |
@juliusb | pretty good deal! | 13:15 |
@juliusb | and that's 48 pounds with minimum quantity of 90 | 13:16 |
stekern | maybe we put that in there, your descriptive name for it will tell what it does ;) | 13:16 |
stekern | yup, it's really nicely priced | 13:16 |
stekern | time for floorball, bbl | 13:17 |
mor1kx | [mor1kx] skristiansson pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/5daf75927003...51e95dc0f9a1 | 17:11 |
mor1kx | mor1kx/master 28fe6f8 Stefan Kristiansson: execute_alu: whitespace cleanup | 17:11 |
mor1kx | mor1kx/master 51e95dc Stefan Kristiansson: execute_alu: simplify (and micro optimize) compare ops... | 17:11 |
--- Log closed Thu Apr 11 00:00:10 2013 |
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