IRC logs for #openrisc Tuesday, 2013-03-19

GentlemanEngineeHello04:20
glowplugHow's it going?04:40
GentlemanEngineeIt fares in a fairly fair fashion.04:50
GentlemanEngineeI just put on the kettle.04:50
GentlemanEngineeI am still investigating the Memory Controller from the Milkymist.04:54
GentlemanEngineeIt appears that the DDR initialization is handled by the CPU (or other circuit) seperate from the Memory Controller, which is placed into a pass-through mode to play an initialization sequence.04:55
glowplugInteresting...05:10
glowplugPass through to hand over control of the controller to the CPU?05:10
GentlemanEngineeFor the initialization.05:12
GentlemanEngineeThat would require determining the initialization sequence for the DDR chip to be used.05:12
GentlemanEngineeAll the more interesting...05:12
stekernyeah, but the init code that the milkymist uses is freely available05:43
stekernhttps://github.com/milkymist/milkymist/blob/master/software/libhpdmc/libhpdmc.S05:47
stekernI've ported that to openrisc too: http://git.chokladfabriken.org/?p=milkymist-openrisc.git;a=blob;f=software/libhpdmc/libhpdmc.S;h=2f9898541283e00e5d50d5f12851751e816fa735;hb=HEAD05:48
GentlemanEngineeAre you stating that the initialization is done in assembly?05:52
GentlemanEngineeI was looking at porting this to mor1kx.05:52
GentlemanEngineeHow generic is this initialization? Would a differing DDR Chip likely require a differing script.05:55
stekernno, I think that is generic05:57
stekernyes, the init is done in assembly.05:57
GentlemanEngineeIntriguing...05:58
GentlemanEngineeI assume one would require loading it during a main init function prior to much else.05:59
stekernyeah, that should run before accessing DDR05:59
GentlemanEngineeAre there any barriers to creating this in Verilog to be synthesized into the CPU/Memory Controller.06:00
GentlemanEnginee*?06:04
stekernno06:15
stekernbut you could just put it in an ROM in the soc06:15
GentlemanEngineeI might give that an attempt after.06:15
stekernso, really, no point06:15
GentlemanEngineeHow would the ROM be any different?06:16
stekernthe code isn't located in the DDR06:16
stekernand on-chip06:16
GentlemanEngineeIf it was a cicuit that was run at reset, would that not be preferred?06:18
stekernnot necessary06:20
stekernyou waste logic on that, vs some blockram06:20
stekern*necessarily06:21
GentlemanEngineeSo, you recommend a ROM that is called by the main init routine?06:22
stekernI rececommen that the cpu reset into the ROM06:32
stekernlike we already do on many boards06:33
stekernyou either need aROM or some other device (i.e. flash) to boot from06:34
GentlemanEngineeOh I see. The ROM would then be set to call a specific memory location that can be used to call a main function, or OS booting?06:41
stekernexactly06:45
GentlemanEngineeThat would work.06:45
stekernit should also serve the purpose of moving useful data into the ddr06:46
stekernfrom somewhere06:46
stekernon most of the boards there is some sort of spi flash06:46
stekernif you have parallell flash you can execute out of that instead of the rom06:47
stekernquad spi flash could probably be used for that too06:48
GentlemanEngineeI just did not wish to require the user to call an assembly routine in order to use RAM. That was a little frusterating.06:50
GentlemanEnginee*would be06:51
stekernyes, I agree06:51
stekernnot that would be an odd requirement, but openrisc sw (e.g.u-boot) assume that the main mem is ready to use06:54
GentlemanEngineeYes, that was the manner of use I was concerned about.06:57
GentlemanEngineeIf you are not using an OS, or something such as FreeRTOS, it is not difficult to have hardware initialization routines. However, even then it is tedious.06:58
GentlemanEngineeHello mbuf.07:02
mbufGentlemanEnginee: hi07:03
GentlemanEngineeHow fares the battle?07:03
mbufGentlemanEnginee: which one?07:03
GentlemanEngineeAll, none, or a superposition thereof...07:03
mbufGentlemanEnginee: All fine07:04
GentlemanEngineeWhat manner of projects are you working on?07:04
mbufGentlemanEnginee: you are not a bot, are you?07:05
GentlemanEngineeI consider myself to have passed Turing Tests...07:07
mbufGentlemanEnginee: :)07:07
mbufGentlemanEnginee: nothing in particular, is there anything in openrisc that I can help with?07:08
GentlemanEngineeI am rather new here, and simply learning some ropes.07:08
mbufGentlemanEnginee: okay07:08
GentlemanEngineeI am currently looking at porting the Milkymist Memory Controller to mor1kx.07:09
mbufGentlemanEnginee: do you have a development board to play with?07:09
mbufGentlemanEnginee: I see07:09
GentlemanEngineeNot yet.07:09
GentlemanEngineeI had one, but lost it back to its original owner.07:09
mbufGentlemanEnginee: okay07:09
GentlemanEngineeglowplug has his heart set on creating his own development board.07:10
GentlemanEngineeI am considering giving him a hand.07:12
GentlemanEngineeOther than that, I am leaning towards a Spartan 6 development board.07:13
mbufGentlemanEnginee: okay07:17
mbufGentlemanEnginee: will catch up with you later07:17
GentlemanEngineeQuite likely...07:19
GentlemanEngineeA good night to all.08:18
stekernman, olofk wasn't joking when he complained about the CDC in ethmac...08:57
stekernjust took a peek in eth_wishbone.v08:58
stekernjeremybennett, _franck_: how does gdbs dump command read stuff from memory? byte by byte?09:33
jeremybennettstekern: A good question - let me check09:43
stekernright now I'm doing: set pagination off; set logging on; x/4096 0x9600000009:44
stekernwhich works perfect, but I imagine that dump would be faster09:45
stekernmaybe it won't be that much faster, now when I start to think about it09:46
stekernmost of the time is probably spent reading from the target anyway09:46
jeremybennettLooking at the packets, it uses an "m" packet to read a block of memory.09:46
jeremybennettSo however the GDB server chooses to implement the memory packet, that's how it will do it.09:46
stekernand that translates to what in layman terms? ;)09:47
stekernah, ok09:47
jeremybennett(Tested with GDB 7.5.1 for ARC and gdbserver on ARC linux)09:47
stekernI just get a Cannot access memory at address 0x9600000009:47
jeremybennettBasically the GDB client asks the target for the block of memory from <start address> to <end address> and the target sends that back.09:47
jeremybennettThere's a limit on packet size, so if you ask for a large amount it will use multiple packets.09:48
stekernbut I get that on 0x100 too09:48
stekernso maybe we doesn't dupport 'm' packages?09:48
jeremybennettI'm sure you do. If you use "set debug remote 1" it will show you the packets being sent.09:49
jeremybennettLooking at gdbserver it uses ptrace with PTRACE_PEEKTEXT to get the memory values.09:49
jeremybennett(linux_read_memory in linux-low.c)09:50
stekernCannot access memory at address 0x9600000009:50
stekernäääh09:50
stekernhttp://pastie.org/662351209:51
jeremybennettA 'm' packet can return an error packet (Enn) if it can't read the memory.09:51
stekernwas what I tried to paste09:51
jeremybennettJust looking09:51
jeremybennettThat looks correct to me. Why does the GDB server think it can't read 0x100 bytes at 0x100?09:52
jeremybennettWhat are you using as your GDB server? gdbserver on Linux? OpenOCD's server?09:52
jeremybennettAnyway the problem is in the GDB server, not in the GDB client.09:53
stekernatm, or_debug_proxy09:53
stekernI'll test with openocd09:53
stekernI think I'll stick with the textual 'x' dump anyways, so it's no showstopper for me09:55
stekernok, it works perfectly in openocd, so no need to investigate that more09:57
stekernthanks for the help jeremybennett 09:58
jeremybennettstekern: Glad to help looks like a bug in or_debug_proxy10:05
stekernso, trace dump acquired, next step, turn that into a VCD10:11
-!- jeremy_bennett is now known as jeremybennett12:54
stekernthe VCD format is really simple, at least for my needs.13:37
stekernwhy haven't I done this before?13:37
stekernthe answer is probably as simple as, I haven't needed it badly enough13:37
stekernhttp://oompa.chokladfabriken.org/tmp/mor1kx_on_atlys_dump.png13:43
stekernfirst test, trig0 = pc_execute, data0 = pc_decode, data1 = ins_decode and data2 = pc_ctrl13:43
stekernI need to make some nice config file which splits the 32-bit values into proper signal names13:44
_franck__stekern: last time you talked about that I took a look at VCD format and ask myself the same question :)14:36
stekern_franck__: the actual logging to blockram is fairly simple too: http://git.chokladfabriken.org/?p=trace_logger.git;a=blob;f=rtl/verilog/tracer.v;h=5b1d44e60291b25af6e3ab8c184cf46ded474403;hb=386648c07cc78a67d4b0d6f5d1421a7f5839229015:02
stekernjust need to improve it, using signaltap for the last months have shown me how it _should_ work15:03
stekernI need to make a circular buffer so I can get to see the data *before* the trigger15:04
stekernthat's usually what's interesting15:04
stekerncoupled with gdb's 'x' command and file logging it'll become a pretty "easy to use" setup15:06
stekernless tedious than I had anticipated myself15:07
_franck__I was about to ask you why you're not using signaltap...but you're working on xilinx now :)15:09
stekernyeah, I've moved over to the atlys board and everything is broken :(15:10
stekernand I feel like a blind person without signaltap, so now I have to build my own =P15:11
stekernif just stuff like: assign debug_signal = my_module.my_other_module.some_signal;15:12
_franck__I've always wanted to do one :) but here we don't have automatic signal connections and reconfiguration on the display names on the host side15:12
stekernwould be synthesizable, everything would just be a dance on roses15:12
stekernthat's the most tedious part, reconnecting the debug signals15:13
stekernespecially if it's one that's buried deep in some module15:14
_franck__this is a very anoying  thing with those HDL languages15:16
_franck__you want to add a signal on your top and you're good for 15 minutes :)15:16
stekernI don't understand why the synthesizers doesn't support that, but the simulators does15:17
jeremybennett_franck__: Did you see my GDB post. Are you interested in submitting the or1k port?16:58
_franck__I saw it. I was thinking it was like GCC: no submission without gurus abrobation17:00
_franck__I would need to include the tdesc file i the sources (for now, the tdesc file in _only_ get from the remote)17:00
jeremybennettYou have to submit and have it reviewed, which takes time.17:07
_franck__blueCmd: are you still here ? I think you've already did that (plus your work on the linux gdb). Could you share this ?17:07
jeremybennettYou also have to have an agreement with the FSF to submit stuff.17:07
blueCmd_franck__: I am!17:07
blueCmd_franck__: I'm busy with my thesis though, so I'm not as active as my super-active february :P17:08
_franck__jeremybennett: ok so I can't submit, you're the only one able to do that17:08
jeremybennettI have that, so if necessary I can submit on your behalf (you'd have to assign it to me, and then I would assign it)17:08
jeremybennettYao has said he'll hold off deleting the current stuff if we submit within a 2-3 months. If you have a dissertation to complete that might not be possible17:09
blueCmdthere is also the matter of how to seperate the tdesc for baremetal OR and linux OR17:09
jeremybennettSo perhaps I should let him delete the current stuff, and then we start with a new submission.17:09
jeremybennettI haven't looked at the latest code. Is the tdesc the XML description?17:10
jeremybennettIf so, you are correct to get it from the remote. But you can put it in the gdb/features subdirectory.17:11
_franck_I've been disconnected17:16
-!- Netsplit *.net <-> *.split quits: serp_, Gentlema`, _franck__17:21
glowplug`I have apparently joined twice.19:07
asmtwice the fun!19:14
glowplug`=)19:20
stekernring buffer (and thus pre trigger support) implemented: http://git.chokladfabriken.org/?p=trace_logger.git;a=blobdiff;f=rtl/verilog/tracer.v;h=da5f073c18dd4dc2804e2cd3eb4918bf80206d46;hp=e95538fc6ed713874fb125f6fae3c8e5774b3853;hb=694a6af7717f7fde6ec51affd750d027823d47e6;hpb=73753c47b6603411d354dd2709c79402e7a11e5322:28

Generated by irclog2html.py 2.15.2 by Marius Gedminas - find it at mg.pov.lt!