| _franck_ | juliusb: ping | 00:04 |
|---|---|---|
| jonibo_ | derRichard: no worries... | 09:52 |
| -!- flea86 is now known as flea86|dinner | 11:15 | |
| -!- flea86|dinner is now known as Flea86 | 13:13 | |
| derRichard | jonibo_: how does timekeeping work on linux-openrisc? /proc/interrupts does not show a timer | 13:30 |
| juliusb | does anyone have any opinion on the behavior of or1k machines when returning from exception and another exception has occurred | 15:07 |
| juliusb | say in the case of a l.rfe which re-enables interrupts and there is an interrupt pending | 15:08 |
| juliusb | should we execute an instruction before doing that interrupt? | 15:08 |
| juliusb | and what should the EPCR value hold? the address we were going to l.rfe to? | 15:08 |
| juliusb | I'm not certain the architecture spec manual is clear on this | 15:09 |
| juliusb | probably the most sensible thing is put where you were going to continue executing from into EPCR | 15:11 |
| juliusb | (in the case of l.rfe into an interrupt) | 15:11 |
| juliusb | and then handle the interrupt (go straight to 0x800 with exception-handling SR) | 15:12 |
| jonibo_ | derRichard: the timer interrupt is not a "regular" interrupt... it's a special timer interrupt that doesn't appear in /proc/interrupts because the exception doesn't go via the hardware interrupt exception and thus doesn't need a registered interrupt handle (the handler is explicitly registered in entry.S) | 20:00 |
| jonibo_ | juliusb: no you should not execute an instruction... the interrupt exception should trigger immediately if an interrupt is pending | 20:00 |
| jonibo_ | EPCR should be the same as for the previous interrupt | 20:01 |
| stekern | i agree | 20:01 |
| jonibo_ | I think the arch spec is clear on this... but perhaps my memory is tricking me | 20:01 |
| jonibo_ | derRichard: as for the rest of the openrisc timekeeping, it's all in arch/openrisc/kernel/time.c | 20:03 |
| derRichard | jonibo_: thx. i read arch/openrisc/kernel/time.c but got confused why there is no interrupt... | 20:04 |
| derRichard | that's why i was asking | 20:04 |
| derRichard | i gotta go now. cu | 20:06 |
| juliusb | I can't see where it is in the arch spec - I read the exception section, but I agree with you | 20:15 |
| juliusb | on l.rfe, if there's a pending interrupt or tick timer exceptino, you should go straight there, and EPCR/EEAR should remain as they were before l.rfe was executed | 20:16 |
| stekern | but isn't that kind of implied? I mean, you are _about_ to execute what's in EPCR and an interrupt occurs. Isn't that was happens regardless if you are rfeing or not? | 20:19 |
| stekern | (except that what you are about to execute isn't in EPCR) | 20:19 |
| juliusb | there's certainly nothign in chapter 6 about the exact behavior of l.rfe when tick and PIC interrupts are pending - it makes sense that you go straight to that exception, but it doesn't say you _have_ to, so it appears to me as if you could do it either way, and then possibly get into trouble when you write software relying on this feature | 20:20 |
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