| --- Log opened Wed Jul 11 00:00:52 2018 | ||
| shivm28[m] | shorne: Hi, I am implementing ‘g’ - Read general registers command. Now, to read GPRs from the CPU core, I can read SPR register addresses 1024-1535 (first 32) from Group 0 . | 02:54 |
|---|---|---|
| shivm28[m] | I think this method should work specifically for OR1K. | 02:55 |
| shivm28[m] | Is that correct? | 02:55 |
| shivm28[m] | These SPR register addresses have GPRs mapped to SPR space. | 02:59 |
| shorne | shivm28[m]: what do you mean, I think it doesnt need to be special for openrisc | 10:51 |
| shorne | it just needs to take the register number and send it to the debug interface? | 10:51 |
| --- Log closed Thu Jul 12 00:00:53 2018 | ||
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