| --- Log opened Wed May 02 00:00:08 2018 | ||
| wallento | shivm28[m], hi | 14:02 |
|---|---|---|
| wallento | you there? | 14:02 |
| wallento | did you source the optimsoc-environment.sh script? | 14:03 |
| wallento | opensocdebugd should be in the path | 14:03 |
| shivm28[m] | wallento: Hi, thanks for the help. I was following old examples. | 14:07 |
| shivm28[m] | I build my environment using master branch but was following some old version of examples. Figured out the error. Everything worked fine. : } | 14:08 |
| shivm28[m] | wallento: Can I run optimsoc code on Atyls board? | 14:09 |
| shivm28[m] | *Atlys | 14:09 |
| wallento | great to hear | 14:10 |
| wallento | generally yes | 14:10 |
| wallento | obviously, the devil is in the detail, that it hasn't been ported so far | 14:11 |
| wallento | which board was it again? | 14:11 |
| wallento | ah, I found | 14:11 |
| shivm28[m] | Spartan 6 Atlys board | 14:12 |
| wallento | I see | 14:12 |
| wallento | so, it should be generally possible | 14:12 |
| wallento | I don't have access to one and its too expensive to play around | 14:13 |
| wallento | but I can remotely assist you | 14:13 |
| shivm28[m] | So, I am a GSoC student this year working on adding CDM module and GDB-server to opensocdebug system. | 14:14 |
| shivm28[m] | Just playing around with OptimSoC for a while to get a feel of OpenSoCDebug system. | 14:15 |
| wallento | oh, yeah, hi | 14:16 |
| wallento | I am co-mentoring you! | 14:16 |
| wallento | :) | 14:16 |
| wallento | is the Atlys board a target board of Tim Videos? | 14:17 |
| shivm28[m] | Yes. | 14:17 |
| wallento | I see | 14:18 |
| wallento | I can have a look at it | 14:18 |
| wallento | otherwise it may make more sense to directly dive into the topic | 14:19 |
| wallento | and integrate the basic opensocdebug into the Tim Video design | 14:19 |
| shivm28[m] | As a first step, I am working on the specification of CDM module. Now, rest of the modules are programmed using SystemVerilog. I was wondering if it is possible to program SV code on Atlys board? | 14:19 |
| wallento | yes, definetely | 14:20 |
| wallento | can we followup later here: https://gitter.im/optimsoc/Lobby | 14:20 |
| wallento | I read that more often | 14:20 |
| shivm28[m] | Just a very trivial question: Should I use any IDE for programming in System Verilog? | 14:21 |
| wallento | as the editor it is your decision, for synthesis you will need vivado or ISE | 14:21 |
| shivm28[m] | For Atlys board, I need ISE. But ISE doesn't support SystemVerilog. Am I missing something? | 14:23 |
| wallento | oh, really?! | 14:25 |
| wallento | I will double check | 14:25 |
| wallento | otherwise we may find a good workaround | 14:25 |
| shivm28[m] | Ok cool!! | 14:25 |
| shivm28[m] | So, I can discuss all my doubts here: https://gitter.im/optimsoc/Lobby, right? | 14:27 |
| wallento | yes, philipp and stafford are also there | 14:30 |
| wallento | its a bit more convenient than IRC | 14:30 |
| shivm28[m] | Great!! | 14:33 |
| --- Log closed Wed May 02 19:12:39 2018 | ||
| --- Log opened Wed May 02 19:12:47 2018 | ||
| -!- Irssi: #openrisc: Total of 45 nicks [0 ops, 0 halfops, 0 voices, 45 normal] | 19:12 | |
| -!- Irssi: Join to #openrisc was synced in 29 secs | 19:13 | |
| -!- Netsplit *.net <-> *.split quits: mripard, juliusb | 19:17 | |
| -!- stephen_ is now known as Guest21438 | 22:39 | |
| Guest21438 | hello | 22:40 |
| --- Log closed Thu May 03 00:00:09 2018 | ||
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