| --- Log opened Wed Apr 12 00:00:26 2017 | ||
| wallento | shorne: we interface it to our trace debug infrastructure at Open SoC Debug | 02:19 |
|---|---|---|
| wallento | which essentially puts it into packets with PCs and timestamp and on the host we reconstruct the function call flow | 02:20 |
| wallento | its on my todo list to build an example which doesn't need optimsoc | 02:20 |
| wallento | and mithro's soc | 02:20 |
| mithro | hey wallento | 02:21 |
| mithro | wallento: Turns out that I can do a GSoC project in about 2 weeks :-P | 02:22 |
| wallento | thats great :) | 02:23 |
| wallento | which board do you target again? | 02:23 |
| mithro | Many | 02:23 |
| mithro | But I've been regularly working with Digilent Atlys, Numato Opsis and Numato MimasV2 recently | 02:24 |
| mithro | Just been adding Digilent Arty support | 02:24 |
| mor1kx | [mor1kx] wallento pushed 1 new commit to master: https://github.com/openrisc/mor1kx/commit/d73be377a47b0cbf6aa99aa7be886c877c9e34e3 | 02:24 |
| mor1kx | mor1kx/master d73be37 Stefan Wallentowitz: Merge pull request #50 from openrisc/traceexec-jump... | 02:24 |
| wallento | excellent, maybe we can collaborate on the arty then, because its the only one I have at hand | 02:24 |
| wallento | as a ramp up | 02:25 |
| mithro | We have some support for the Pipistrello and minispartan6 | 02:25 |
| mithro | Oh and the Nexys Video | 02:25 |
| wallento | a guy at philipp's group currently finishes the gdb<->opensocdebug<->adv_dbg_sys stuff | 02:25 |
| wallento | I meant to get one of the Nexys4 video | 02:26 |
| mithro | wallento: Probably will add Genesys(?sp) 4 support too | 02:26 |
| mithro | Any Spartan 6 / Artix 7 / Kintex 7 board with DDR and video inputs/outputs makes a good target for us | 02:27 |
| mithro | For anyone who is interested in Linux on our SoC (which is also Linux on or1k for now) -- feel free to join https://groups.google.com/forum/#!forum/linux-litex | 03:56 |
| mor1kx | [mor1kx] wallento deleted traceexec-jump at 1dea99f: https://github.com/openrisc/mor1kx/commit/1dea99f | 04:10 |
| mor1kx | [mor1kx] wallento created fixes (+8 new commits): https://github.com/openrisc/mor1kx/compare/978d2d2341a1^...d9a7ea5be957 | 04:13 |
| mor1kx | mor1kx/fixes 978d2d2 Olof Kindgren: Fix width mismatch in store buffer | 04:13 |
| mor1kx | mor1kx/fixes 4ecbb64 Olof Kindgren: Fix unused wires in lsu cappucino | 04:13 |
| mor1kx | mor1kx/fixes 4bd9ba7 Olof Kindgren: Fix unused/missing wires in mor1kx_fetch_cappuccino | 04:13 |
| mor1kx | [mor1kx] wallento pushed 1 new commit to fixes: https://github.com/openrisc/mor1kx/commit/a12eed1441e65ada386260f1fe1a5e541d62de03 | 04:24 |
| mor1kx | mor1kx/fixes a12eed1 Stefan Wallentowitz: Add travis lint | 04:24 |
| mor1kx | [mor1kx] wallento force-pushed fixes from a12eed1 to 16ecf91: https://github.com/openrisc/mor1kx/commits/fixes | 04:48 |
| mor1kx | mor1kx/fixes 16ecf91 Stefan Wallentowitz: Add travis lint | 04:48 |
| bandvig | Hello all. Currently we keep ability of asynchronous reset for CPU core, while Wishbone specification, for example, requires synchronous reset. | 07:18 |
| bandvig | If I understand correctly, removing asynch-reset makes possible to reduce hierarchy in many registers by converting | 07:18 |
| bandvig | “if (rst) begin <operators> end else if (pipeline_flush) begin <same operators> end …” to “if (rst | pipeline_flush) begin <operators> end …”. | 07:18 |
| bandvig | I see one risk for simulation here. If pipeline_flush is output of combinatory logic, its initial value ‘X’ could block initial reset and simulation could fail. | 07:19 |
| bandvig | To overcome this initial values are required for all pipeline_flush contributors. | 07:19 |
| bandvig | However it is not a problem at least for MAROCCHINO pipe, because pipeline_flush is a register there. | 07:19 |
| bandvig | So, is it really useful to keep asynchronous reset for CPU core? | 07:19 |
| mithro | So, what is the best way to build an initrd for or1k? | 07:46 |
| bandvig | Re-formulation: is there a strong reason to keep asynchronous reset ability for CPU core? | 08:17 |
| mor1kx | [mor1kx] wallento pushed 9 new commits to fixes: https://github.com/openrisc/mor1kx/compare/16ecf9129096...904bde9ae3ba | 08:22 |
| mor1kx | mor1kx/fixes ac44868 Stefan Wallentowitz: Minor style fix | 08:22 |
| mor1kx | mor1kx/fixes 5fb65c4 Stefan Wallentowitz: Replace delayed assignments in unclocked blocks | 08:22 |
| mor1kx | mor1kx/fixes 8f1da6f Stefan Wallentowitz: Fix linter warning for incorrect SPR select bits... | 08:22 |
| mor1kx | [mor1kx] wallento opened pull request #51: Linter fixes (master...fixes) https://github.com/openrisc/mor1kx/pull/51 | 08:26 |
| mor1kx | [mor1kx] wallento pushed 3 new commits to fixes: https://github.com/openrisc/mor1kx/compare/904bde9ae3ba...32fa1122ef56 | 10:01 |
| mor1kx | mor1kx/fixes 80b58b3 Stefan Wallentowitz: Fix register access widths for shadow registers | 10:01 |
| mor1kx | mor1kx/fixes c58d29e Stefan Wallentowitz: Fix MMU way indexing | 10:01 |
| mor1kx | mor1kx/fixes 32fa112 Stefan Wallentowitz: Fix higher address bis in MMU translation | 10:01 |
| -!- andrzejr_ is now known as andrzejr | 17:00 | |
| shorne | Hi all, I have put together this project to capture all of the files that are currenting in openrisc repo's that will not really go upstream in the end | 19:47 |
| shorne | https://github.com/stffrdhrn/or1k-utils | 19:47 |
| shorne | i.e. the initramfs directory in linux | 19:47 |
| shorne | or the site.exp in or1k-src (the old gcc, gdb and binutils project) | 19:48 |
| mithro | shorne: So do you have real or1k hardware? Or are you just running on FPGAs like us? | 22:25 |
| shorne | mithro: I'm very low budget with a de0 nano only | 23:36 |
| shorne | I might get something else, but I got de0 nano to force me to design my own hardware | 23:36 |
| shorne | :) | 23:36 |
| mithro | shorne: I wonder how the de0 nano compares to the MimasV2 | 23:39 |
| shorne | nice, that does look to have everything I would need | 23:44 |
| shorne | mithro: I mean everything anyone would who is starting out, its xilinx | 23:45 |
| shorne | do you know what the stereo jack is connected to? | 23:46 |
| mithro | Nope | 23:48 |
| mithro | shorne: the lx9 is a bit small - it would have been nice if they had a lx25 option | 23:50 |
| --- Log closed Thu Apr 13 00:00:28 2017 | ||
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