IRC logs for #openrisc Sunday, 2017-02-19

--- Log opened Sun Feb 19 00:00:07 2017
psychotropeokay so I'm beginning to think I'm in a bit over my head, here is my current situation for those interested  / want to help:02:30
psychotropeI want to run an openRISC core on a DE0-Nano board, and then run linux on that02:30
psychotropeI would like to compile GPG from source for openRISC once I have linux installed02:31
psychotropenow the hard part, the DE0-Nano has no large built in storage, how would I best be able to boot the system without having to load everything from a linux PC at boot02:31
psychotropeall the need is serial IO for those who mentioned it earlier, I will be using a parallax propellor to interact over serial with the busybox shell02:32
psychotropeso in short: can I compile GPG on openrisc, and can I run the system independent from a PC02:33
psychotropethanks to all who helped :)02:33
psychotropeoh and congrats olofk02:33
shorne_psychotrope: Would you be ok to build GPG on our desktop then package and send it to the de0 nano?02:52
-!- shorne_ is now known as shorne02:52
olofkpsychotrope: Yeah. As shorne said, cross-compiling on your PC would be the recommended way to do it. There's a SPI Flash on the board, and that will fit a compiled Linux system fine11:29
psychotropeso build GPG directly into the Linux install rather than installing it afterwards?  I don't see why that would be a problem at all.  olofk: I didn't know the spi flash onboard was enough to handle a full linux install12:45
psychotropesorry if I sound like a total noob here12:46
psychotropeI don't care how I have to get it working12:52
psychotropeI'd just really like the boot up my openRISC system anywhere and have access to GPG tools12:52
psychotropereading and writing to an SD card for data tranfer would also be great; don't know how I'd implement that though12:53
psychotropeI need some way to transfer data to and from the DE0-nano, and I'm using the serial connection for connecting the parallax propellor12:54
-!- ZipCPU|Laptop_ is now known as ZipCPU|Laptop15:58
olofkpsychotrope: Just ask away. That's how we learn new stuff :)17:08
olofkpsychotrope: Until you have a running system in your SPI Flash, you will use JTAG to get stuff to the board17:08
olofkSo you first program the FPGA via JTAG17:09
olofkWith the FPGA programmed, the OpenRISC CPU and the debug system will be running, so now you connect to the debug system through JTAG. That way you can upload your software (Linux kernel + userspace) directly to RAM and start executing17:10
olofkOnce you have a linux image that you're happy with, you can create a image file with the FPGA + Linux and program that to the onboard Flash.17:11
olofkFrom then on, when the board is powered up, the FPGA will automatically load from the Flash, and when the CPU is started, it will load the software from Flash to RAM, and you got a running Linux system that you can connect to through UART17:12
psychotropeolofk: how much space is there in the Flash on the DE0-nano.  I didn't see it listed anywhere17:47
psychotropeI'm concerned that GPG will be too big to fit along with linux kernel in the flash17:47
psychotropealso, what does a bigger FPGA get me with openRISC? More cores?17:48
psychotropeI assume the images found here: : are purpose built for each chip and use more of the FPGA than on the smaller boards17:49
-!- ZipCPU_ is now known as ZipCPU19:56
--- Log closed Mon Feb 20 00:00:08 2017

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