--- Log opened Mon Nov 28 00:00:03 2016 | ||
wallento | shorne: the pgp web of trust was updated: https://pgp.cs.uu.nl/mk_path.cgi?FROM=00411886&TO=5e6627e4&PATHS=trust+paths | 02:16 |
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shorne | wallento: cool, it puts me at 4 levels from Linus, I heard from peter z that it needs to be 3 for linus to accept patches. | 08:42 |
wallento | So, can I just mail them? | 08:42 |
wallento | who is this Linus that he decides what gets into Linux! | 08:42 |
shorne | I met one guy yesterday that will sign my key to put me at 3, but it ended up he forgot his pasword | 08:42 |
wallento | ha | 08:43 |
shorne | he forgot his pgp passphrase, so he was going to figure that out then sign | 08:43 |
shorne | Ill meet him again this friday. If it doesnt work out I can try to send, and if he doesnt except we can fall back to you :) | 08:44 |
wallento | yes, that is good | 08:45 |
wallento | does it help if I sign/ack/whatever the patches? | 08:45 |
shorne | Meaning ill me the guy signing my key again, and then we can check with this linus guy | 08:45 |
shorne | well, I guess al you really would need to do is create a signed tag (of my branch) probably best to host on openrisc/linux | 08:46 |
shorne | I could push there, then you could tag and send the mail to the kernel | 08:47 |
shorne | lets give it a week though | 08:47 |
shorne | hmm, missed a few characters in those sentences, let me know if thats not clean | 08:48 |
shorne | ~~~ | 08:49 |
shorne | On the other hand I am giving a presentation about openRISC, I wanted to cover some differnecs between openRISC and RISC-V | 08:49 |
shorne | one is risc-v spec doesnt document an MMU | 08:50 |
shorne | also, a lot is left up to implementation like reset vector | 08:50 |
shorne | But on the other hand, exception handling in risc is pretty flexible as there is a dynamic trap vector, and multiple trap status refisters | 08:51 |
shorne | anyone have suggestion on any othe pros/cons vs openrisc? | 08:52 |
olofk_ | shorne: If you want to run 32-bit Linux, I think OpenRISC is a better idea. Not sure that works yet on RISC-V | 08:58 |
shorne | thats right as of now, but they have a set of patches for their rocket chip | 09:01 |
olofk_ | aha | 09:06 |
olofk_ | Thought they focused on the 64-bit stuff | 09:07 |
shorne | oh, I didnt realize that | 09:15 |
shorne | https://github.com/riscv/riscv-linux/tree/master/arch/riscv/configs, right both their default configs are for 64 bit | 09:19 |
wallento | yeah, it is not a theoretical limitation, but a matter of focus | 09:34 |
wallento | the RISC-V stuff is a bit cleaner and better thought through | 09:34 |
wallento | but I like the OpenRISC community better | 09:34 |
wallento | ;) | 09:34 |
-!- Netsplit *.net <-> *.split quits: stekern, rokka, rah, mwfc, rhythmx | 11:01 | |
-!- Netsplit over, joins: rah, stekern, rokka | 11:02 | |
kc5tja | olofk_: yt? | 12:30 |
kc5tja | olofk_: Just wondering, you'd mentioned that you had bus size adapters for Wishbone. Is there one you are aware of that would be license-compatible with an MPLv2 project (namely mine)? | 12:31 |
olofk_ | kc5tja: I do have, but I'm not quite sure they fully work. Happy to relicense them if you find them useful though. You can find the interconnect tools here https://github.com/olofk/wb_intercon | 17:38 |
kc5tja | Unfortunately, the resizer doesn't implement the state-machine I need. | 19:01 |
kc5tja | Thanks though. | 19:01 |
--- Log closed Tue Nov 29 00:00:04 2016 |
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