--- Log opened Sat Sep 24 00:00:26 2016 | ||
-!- stefanct__ is now known as stefanct | 00:21 | |
olofk | cw200100: I haven't really used gdbserver myself, but perhaps you can cross-compile it. the other person who might know about this is jeremybennett | 01:51 |
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olofk | And as you say, gdbserver is your only option here | 01:52 |
wallento | thanks olofk, the -sv and -vhdl2008 flags are only necessary in non-project flow | 02:55 |
wallento | with the project flow those are supported globally | 02:55 |
wallento | I can 100% confirm for SV, because I use it widely | 02:55 |
wallento | for VHDL 2008 at least the manual says the same, so I will trust it for now | 02:56 |
wallento | regarding the tcl files I agree. It was actually there before too for generating IP, but I am not sure if this is just a plain file or something more | 02:56 |
wallento | the biggest issue I had with this was the availability of path information in the TCL files themselves | 02:57 |
wallento | So the plan is to generate Xilinx IP blocks where possible with TCL scripts, because the upgrade_ip path is kinda weak | 02:57 |
wallento | but finally I also faced the issue of different file versions for different tool versions and postponed it for now then | 02:58 |
wallento | olofk, actually the last I something you love to wreck your brain about | 03:26 |
wallento | what I need is something like usage=vivado>=2015.1<=2015.3 | 03:27 |
wallento | :) | 03:27 |
wallento | please define a nice way to type intervals | 03:27 |
cw200100 | Thank you for the pointers olofk. Yes, at first I tried to compile the openrisc binutils-gdb repo, but it looks like or1k-linux is not supported as the host (in configure.srv), so configure fails after a while. The other option I tried was the old svn sources that include gdb-7.2. The latter supports or32-linux as the host, but make using or1k-linux-musl-gcc also fails (multiple errors). | 09:12 |
cw200100 | The gdb-7.2 source was last commited by jeremybennett as you mentioned. My understanding is that you need the older or32 toolchain to use it, so I am wondering if anyone is aware of any updated repo that is compatible with the musl toolchain. | 09:12 |
shorne | hmm, it looks like something is happening with http://www.opencores.org, its going to github pages now? | 09:32 |
shorne | ZipCPU: I would think using or1ksim and gdbserver would be a good first step for doing any debugging | 09:33 |
shorne | for software | 09:33 |
olofk | wallento: I can confirm that -vhdl2008 is required even in project mode | 09:42 |
olofk | This fails unless I use read_vhdl -vhdl2008, even if VHDL 2008 mode is enabled globally http://pastebin.com/9rfva9rx | 09:44 |
olofk | wallento: The thing about enabling vhdl2008 globally is that it was a hidden option that you had to enable manually, while their vhdl 2008 support was still in the beta stage | 09:49 |
olofk | Not sure if it's needed anymore, but I guess it doesn't hurt to enable it if we detect any vhdl 2008 files | 09:50 |
olofk | Found a bug though. upgrade_ips is run even when there aren't any IP in the design. This crashes vivado | 09:50 |
olofk | Maybe add a has_ip flag too | 09:50 |
olofk | wallento: Also, this fails if I enable the sv flag http://pastebin.com/URCMMCQK | 09:58 |
olofk | But not without | 09:59 |
olofk | Not sure if it does some fancy autodetection | 09:59 |
olofk | wallento: Aha. Renaming the file I paste | 10:00 |
olofk | d to .sv makes it fail even without the -sv flag | 10:01 |
olofk | So vivado autodetects depending on suffix | 10:01 |
olofk | That's bad | 10:01 |
SMDhome | olofk: Hi, could you tell me if I should register my gf for orconf if she wants to drop by? | 11:12 |
olofk | SMDhome: If she is joining us for dinner on the saturday, we would like to know, so we can give the correct numbers to the restaurant | 11:48 |
wallento | olofk: I think its fair to detect based on the file extension | 11:48 |
wallento | but we can do a -sv and -vhdl2008 anyways, won't hurt, even if not necessary | 11:49 |
olofk | But if she just wants to drop by for a while on the conference, it's not strictly needed | 11:49 |
wallento | I will amend a fix | 11:49 |
olofk | wallento: The only "real" case where I think it would matter for -sv if for people who use sv features in files ending with .v | 11:50 |
olofk | IIRC xsim treated $clog2 as sv (even if it's technically vlog2005), so I had to enable -sv for verilogSource-2005 files | 11:50 |
wallento | yeah, my experience with sv and vivado was okay recently, never had any issues, but I just use files ending as sv and then its like the maximum support | 11:51 |
wallento | puh, the upgrade ip was solved before I found | 12:20 |
wallento | olofk: pushed to the PR | 12:52 |
wallento | olofk: And also added tclSource support | 13:32 |
wallento | I suppose the Quartus and ISE should be migrated to tclSource too | 13:33 |
--- Log closed Sat Sep 24 14:38:28 2016 | ||
--- Log opened Sat Sep 24 14:45:42 2016 | ||
-!- Irssi: #openrisc: Total of 27 nicks [0 ops, 0 halfops, 0 voices, 27 normal] | 14:45 | |
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-!- andrzejr_ is now known as andrzejr | 14:46 | |
-!- trem is now known as Guest90303 | 14:50 | |
-!- Netsplit *.net <-> *.split quits: jeremybennett, shorne, fotis2, stefanct, Dan, simoncook, _franck_ | 15:03 | |
-!- Netsplit over, joins: Dan | 15:06 | |
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olofk | wallento: Yes. Changing ISE and Quartus would be nice. I overhauled the modelsim backend a while ago, but the others need some extra love | 16:01 |
olofk | Hmm.. tcl files aren't picked up from the cache. Not sure where the error is | 16:13 |
olofk | Whoops. My bad | 16:14 |
olofk | Never mind | 16:15 |
olofk | But VHDL library assignment is still missing, so VHDL support won't work for most cores | 16:16 |
olofk | And I would like to see an explicit top-level setting in the vivado section. Vivado has gotten the top-level wrong on more than one occasion | 16:17 |
-!- andrzejr_ is now known as andrzejr | 16:18 | |
olofk | wallento: Also, what's these xdi files? All Vivado IPs I have used are called xci | 16:21 |
olofk | Did they decide to change their IP format again? | 16:21 |
olofk | Altera likes to do that. I think they have at least four different IP formats, with most IPs only available in one or two formats | 16:22 |
olofk | FPGA vendor IP is a horrible horrible thing to deal with | 16:22 |
olofk | wallento: oh, it was just a documentation typo. The code checks for xci files, but the pydoc says xdi | 16:40 |
--- Log closed Sat Sep 24 17:55:44 2016 | ||
--- Log opened Sat Sep 24 18:10:06 2016 | ||
-!- Irssi: #openrisc: Total of 41 nicks [0 ops, 0 halfops, 0 voices, 41 normal] | 18:10 | |
-!- Irssi: Join to #openrisc was synced in 14 secs | 18:10 | |
kc5tja | Kestrel-3's Verilog design for the 64-bit "Polaris" CPU just executed its first instruction in the test bench. \o| |o/ \m/ \m/ | 23:43 |
kc5tja | I've been waiting a full year for this moment. | 23:43 |
--- Log closed Sun Sep 25 00:00:27 2016 |
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