IRC logs for #openrisc Saturday, 2016-09-24

--- Log opened Sat Sep 24 00:00:26 2016
-!- stefanct__ is now known as stefanct00:21
olofkcw200100: I haven't really used gdbserver myself, but perhaps you can cross-compile it. the other person who might know about this is jeremybennett01:51
olofkAnd as you say, gdbserver is your only option here01:52
wallentothanks olofk, the -sv and -vhdl2008 flags are only necessary in non-project flow02:55
wallentowith the project flow those are supported globally02:55
wallentoI can 100% confirm for SV, because I use it widely02:55
wallentofor VHDL 2008 at least the manual says the same, so I will trust it for now02:56
wallentoregarding the tcl files I agree. It was actually there before too for generating IP, but I am not sure if this is just a plain file or something more02:56
wallentothe biggest issue I had with this was the availability of path information in the TCL files themselves02:57
wallentoSo the plan is to generate Xilinx IP blocks where possible with TCL scripts, because the upgrade_ip path is kinda weak02:57
wallentobut finally I also faced the issue of different file versions for different tool versions and postponed it for now then02:58
wallentoolofk, actually the last I something you love to wreck your brain about03:26
wallentowhat I need is something like usage=vivado>=2015.1<=2015.303:27
wallentoplease define a nice way to type intervals03:27
cw200100Thank you for the pointers olofk. Yes, at first I tried to compile the openrisc binutils-gdb repo, but it looks like or1k-linux is not supported as the host (in configure.srv), so configure fails after a while. The other option I tried was the old svn sources that include gdb-7.2. The latter supports or32-linux as the host, but make using or1k-linux-musl-gcc also fails (multiple errors).09:12
cw200100The gdb-7.2 source was last commited by jeremybennett as you mentioned. My understanding is that you need the older or32 toolchain to use it, so I am wondering if anyone is aware of any updated repo that is compatible with the musl toolchain.09:12
shornehmm, it looks like something is happening with, its going to github pages now?09:32
shorneZipCPU: I would think using or1ksim and gdbserver would be a good first step for doing any debugging09:33
shornefor software09:33
olofkwallento: I can confirm that -vhdl2008 is required even in project mode09:42
olofkThis fails unless I use read_vhdl -vhdl2008, even if VHDL 2008 mode is enabled globally
olofkwallento: The thing about enabling vhdl2008 globally is that it was a hidden option that you had to enable manually, while their vhdl 2008 support was still in the beta stage09:49
olofkNot sure if it's needed anymore, but I guess it doesn't hurt to enable it if we detect any vhdl 2008 files09:50
olofkFound a bug though. upgrade_ips is run even when there aren't any IP in the design. This crashes vivado09:50
olofkMaybe add a has_ip flag too09:50
olofkwallento: Also, this fails if I enable the sv flag
olofkBut not without09:59
olofkNot sure if it does some fancy autodetection09:59
olofkwallento: Aha. Renaming the file I paste10:00
olofkd to .sv makes it fail even without the -sv flag10:01
olofkSo vivado autodetects depending on suffix10:01
olofkThat's bad10:01
SMDhomeolofk: Hi, could you tell me if I should register my gf for orconf if she wants to drop by?11:12
olofkSMDhome: If she is joining us for dinner on the saturday, we would like to know, so we can give the correct numbers to the restaurant11:48
wallentoolofk: I think its fair to detect based on the file extension11:48
wallentobut we can do a -sv and -vhdl2008 anyways, won't hurt, even if not necessary11:49
olofkBut if she just wants to drop by for a while on the conference, it's not strictly needed11:49
wallentoI will amend a fix11:49
olofkwallento: The only "real" case where I think it would matter for -sv if for people who use sv features in files ending with .v11:50
olofkIIRC xsim treated $clog2 as sv (even if it's technically vlog2005), so I had to enable -sv for verilogSource-2005 files11:50
wallentoyeah, my experience with sv and vivado was okay recently, never had any issues, but I just use files ending as sv and then its like the maximum support11:51
wallentopuh, the upgrade ip was solved before I found12:20
wallentoolofk: pushed to the PR12:52
wallentoolofk: And also added tclSource support13:32
wallentoI suppose the Quartus and ISE should be migrated to tclSource too13:33
--- Log closed Sat Sep 24 14:38:28 2016
--- Log opened Sat Sep 24 14:45:42 2016
-!- Irssi: #openrisc: Total of 27 nicks [0 ops, 0 halfops, 0 voices, 27 normal]14:45
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-!- andrzejr_ is now known as andrzejr14:46
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-!- Netsplit *.net <-> *.split quits: jeremybennett, shorne, fotis2, stefanct, Dan, simoncook, _franck_15:03
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olofkwallento: Yes. Changing ISE and Quartus would be nice. I overhauled the modelsim backend a while ago, but the others need some extra love16:01
olofkHmm.. tcl files aren't picked up from the cache. Not sure where the error is16:13
olofkWhoops. My bad16:14
olofkNever mind16:15
olofkBut VHDL library assignment is still missing, so VHDL support won't work for most cores16:16
olofkAnd I would like to see an explicit top-level setting in the vivado section. Vivado has gotten the top-level wrong on more than one occasion16:17
-!- andrzejr_ is now known as andrzejr16:18
olofkwallento: Also, what's these xdi files? All Vivado IPs I have used are called xci16:21
olofkDid they decide to change their IP format again?16:21
olofkAltera likes to do that. I think they have at least four different IP formats, with most IPs only available in one or two formats16:22
olofkFPGA vendor IP is a horrible horrible thing to deal with16:22
olofkwallento: oh, it was just a documentation typo. The code checks for xci files, but the pydoc says xdi16:40
--- Log closed Sat Sep 24 17:55:44 2016
--- Log opened Sat Sep 24 18:10:06 2016
-!- Irssi: #openrisc: Total of 41 nicks [0 ops, 0 halfops, 0 voices, 41 normal]18:10
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kc5tjaKestrel-3's Verilog design for the 64-bit "Polaris" CPU just executed its first instruction in the test bench.  \o|  |o/  \m/  \m/23:43
kc5tjaI've been waiting a full year for this moment.23:43
--- Log closed Sun Sep 25 00:00:27 2016

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