IRC logs for #openrisc Sunday, 2016-09-04

--- Log opened Sun Sep 04 00:00:56 2016
mithroZipCPU|Laptop: litedram -> - DDR3, DDR2, DDR and SDRAM controller00:37
andrzejrmithro, is it better than Xilinx's DDR controller?04:43
andrzejrit still relies on encrypted primitives (serdes, phase interpolator)04:47
andrzejrwhat is the difference between litex and migen? (or what was the reason to fork migen?)04:50
olofkandrzejr: I don't think you can get around using those primitives07:22
olofkBut If I understand correctly, the controller is technology agnostic, with only the phy specific to the FPGA07:22
olofkAnd with a DFI interface between them, which is a standardized interface for these sort of things07:22
andrzejrolofk, thanks, I didn't know about DFI. That makes sense14:58
andrzejrI wonder why Xilinx doesn't use it (not that I'm surprised)14:58
shorneoh, man, I wasted like 2 weeks trying to figure out what was wrong with my de0 nano/tool chain18:00
shorneI couldnt even get hello world to run on it18:00
shorne(hello world) should display on the serial console.  In the end I move the serial lines to new pins and it worked18:01
shorneI think the old pins got static damage18:01
--- Log closed Mon Sep 05 00:00:57 2016

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