IRC logs for #openrisc Friday, 2016-09-02

--- Log opened Fri Sep 02 00:00:53 2016
olofkZipCPU: It's also very useful when you run into bugs in their code that you need to patch00:48
olofkHad one that was caused by a parameter being set to the wrong value when you use 4 16-bit chips in a certain speed range00:50
olofkTook me about two months to figure out00:50
bandvigGuys, regarding FPU flags and ontoshko’s problem.03:26
bandvigIn fact the default value (after reset) for FPCSR is “1” that means that FPEE is “1”, i.e. FPU exceptions are enabled by default. So, inexact flag causes exception in ontoshko’s example.03:26
bandvigOR1K spec doesn’t specify the default value. To overcome the confusing behavior we can set FPCSR to zero by rest instead involving my extension for FPU flags (as olofk did).03:27
bandvigTo change FPCSC we just should change OR1K_FPCSR_RESET_VALUE (in mor1kx-sprs.v) to zero.03:27
bandvigIf no a disagreement, I could make it in some hours by myself, or let somebody (stekern, wallento, …) do the change shortly.03:27
bandvigCorrection. Should be "FPCSR to zero by reset".03:29
wallentobandvig, I would prefer you touch this part :)04:23
wallentoOut of curiosity: What is the inexact flag?04:24
wallentoah, I found that its what it says04:25
olofkah ok. Yes. Turning of the exceptions by default could be a good idea04:42
olofkBut if we do that, we will normally not get any FP exceptions at all04:44
olofkIs that ok, or do programs expect other exceptions to be caught?04:44
olofkNot at all sure how this stuff is used by sw04:46
stekerndo we have software that handles the fp exceptions?05:06
bandvigMy experience : I use them for testing FPU for comparison flags generated by FPU and SoftFloat library. For the testing tool I use my own FPU exception handler.05:24
bandvigHowever, for Whetstone benchmark I switch FPEE off by or1k_mtspr() before running.05:24
bandvigIn our company we use ARM driven by linux. Once time we faced with NaNs, but we don’t manipulate with FPU settings from our code.05:25
bandvigBut they don’t generate exceptions by default.05:26
bandvigAs FPCSR is accessible for write in supervisor mode only, an API for user level application should be designed (al already present) at least in linux.05:26
bandvigFor standalone application (compiled with NewLIB-based toolchain), I think, it could be normal that a programmer have to set FPEE to one explicitly and establish his(her) own exception handler.05:26
wallentoThe spec says its off by default, right?05:33
wallentoin linux it is probably a SIGFPE then05:35
olofkAll good. I vote for turning it off by default then, and then someone can write the relevant code for newlib and Linux if we need it in the future06:24
stekernI second that vote06:55
olofkpoke53281: Are you coming to orconf this year+06:57
olofk?06:57
-!- Netsplit *.net <-> *.split quits: fotis2, simoncook07:07
-!- Netsplit over, joins: simoncook, fotis207:10
wallentoolofk: agree too09:42
bandvigok, I'll make the change in 2-3 hours10:43
SMDwrkolofk: do you have any estimations on how long would it take to boot linux kernel on icarus sim?11:03
mor1kx[mor1kx] bandvig pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/36a23f7cb20b...dc0fa6dd58ae14:09
mor1kxmor1kx/master 74e1b4c Andrey Bacherov: Set default value for FPCSR to zero to disable FPU exception generation. This prevents confusing behavior in standalone application if floating point instructions are used, but FPU exception handler is not established. More detailed discussion could be found here http://juliusbaxter.net/openrisc-irc/%23openrisc.2016-09-02.log.html14:09
mor1kxmor1kx/master dc0fa6d Andrey Bacherov: Merge branch 'master' of https://github.com/openrisc/mor1kx14:09
olofkSMDwrk: I tried to do that a few years ago and gave up after ~24 hours14:41
olofkBut it could be that there are some bugs too14:42
olofkI remember that I had to do some extra stuff to make it work at all, such as clearing the register files in the verilog code14:43
olofkFor that I have since added an option to mor1kx14:43
olofkBut it could also be that something gave up after 2^32 cycles14:43
olofkAh wait.. I think I came to the conclusion that it stopped working after the trace log grew to 2GB14:47
olofkI had an idea of doing a VPI script to dump the trace log to an sqlite db instead of printing to a text file, but I never got around to that14:47
kc5tjaThat will take up more space than the text file due to indexing overhead alone, let alone page alignment inside the file.14:50
kc5tjaMight want to confirm that >2GB files are supported by your Linux kernel before investing in that effort.14:51
SMDhome1olofk: I'm running 100k dhrystone loops on icarus and log file is already 8gb14:58
SMDhome1I think it's a good idea to add trace support for verilated simulation14:58
SMDhome1it's hundreds times faster14:58
SMDhome1Wow! It's almost finished running after 24 hours15:01
SMDhome1I've forgot to pass --clear_ram option, what a shame15:03
stekerndon't we have trace support for verilated simulations?17:05
stekernor was that only in the old one?17:05
olofkstekern: I don't think that was ported. I just did a really basic verilator testbench since the old one had a lot of ties to orpsocv2 that was hard to figure out when I did it17:41
olofkIIRC17:41
olofkSMDhome1: You have it running already?17:42
olofkNot sure if you need --clear_ram17:42
olofkBut it wouldn't hurt, just to be sure there aren't any weird corner cases17:43
kc5tjaOh, sorry, just noticed I posted in the wrong channel.  (Wrong *server* in fact.)  Apologies for any confusion or coffee-on-keyboard mirth.17:45
--- Log closed Sat Sep 03 00:00:54 2016

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