IRC logs for #openrisc Thursday, 2016-07-21

--- Log opened Thu Jul 21 00:00:48 2016
_franck_ZipCPU, olofk : andrzejr used the Digilent embedded JTAG adapter on a Nexys4 board ->
_franck_seems like it may work on Atlys.01:56
olofk_franck__: I think there is a difference since Nexys seems to use a FTDI chip while Atlys uses a Cypress FX203:54
olofkBut mithro is the one who demoed using an alternative fx2 firmware for the atlys, so the help is near :)03:55
mithroolofk: I have a Nexys sitting on my desk03:56
mithroactually a Nexys Video03:56
mithroolofk: we have a GSoC student working on rewriting the FX2 firmware to emulate the FTDI chip better03:56
_franck__olofk: you're right I remember now04:27
mithroolofk: I got that adv_debug_jtag stuff working on the Atlys via the Digilent cable with OpenOCD, ixo-usb-jtag and misoc - but I've yet to finish cleaning it up and publishing05:53
olofkmithro: That's great. Did you only have to change the fx2 firmware for that, or were there any changes to adv_debug_sys too?07:48
mithroolofk: Most of it was misoc stuff07:49
olofkah ok07:49
mithroand getting the right settings07:49
olofkSo, not using misoc, what would one need to do? Flash the fx2 and then instantiate a Xilinx virtual jtag + adv_debug_sys?07:51
olofkAnd what protocol would I use for OpenOCD?07:52
mithroolofk: Do "fx2load <firmware>" then use OpenOCD with the right configuration (assuming the FPGA has the Xilinx+adv_debug_sys firmware running on it)07:52
olofkNice. That makes it a lot more usable than before07:55
olofkJust sucks that I haven't had an Atlys board for three years now07:55
mithroolofk: It also works with the Opsis board07:59
olofkLooks like the ghdl backend in FuseSoC hasn't been used too much15:24
olofkTurns out it doesn't work at all :)15:24
olofkGood thing I waited a bit to release FuseSoC 1.5. Found two pretty severe bugs so far15:24
ssvbis a clone of ?19:40
--- Log closed Fri Jul 22 00:00:50 2016

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