IRC logs for #openrisc Saturday, 2016-05-07

--- Log opened Sat May 07 00:00:55 2016
shornewallento: If I have it break at a place after init, then it gets a bit further, but it seems libgloss never populates at trap handler. Just a _or1k_timer_interrupt_handler.03:59
shorneBut.. I am wondering how breakpoints worked in or1ksim then..., mabye there is a sim function for it rather than simulating the hardware debug unit.04:00
wallentoshorne: oh yeah, there are no exception handlers in baremetal04:22
shorneok, I think its making more sense, actually in gdb sim you can load it up with 'target sim', you can also do some not so well documented stuff like 'target sim --trace-insn' to setup simulator debug04:45
shorneWhen I run my test then its easy to see where its getting into trouble, and its the missin exception handler setup04:45
shorneSo... looks like I might have to get libgloss updated, double checking why its working find in or1ksim04:46
shorneI see, or1ksim uses the debug stop register (DST) setting TE (trap exception), meaning breakpoints trigger debug development interface06:13
shorneso cpu stalls and raises some flags, instead of executing the trap handler06:14
shorneso a few options to get the sim working06:25
shorne1. implement newlib trap handlers (but how would it work for non newlib builds?)06:25
shorne2. implement / use the debug unit like or1ksim sim is doing06:26
shorne3. get better idea from someone who knows more :)06:27
olofkshorne: I would have gone with option 3 :)10:37
shorneolofk: thats what I am thinking, I am looking at how other sims are handling breakpoints. Maybe I can get some ideas from there17:33
--- Log closed Sun May 08 00:00:56 2016

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