IRC logs for #openrisc Monday, 2016-04-18

--- Log opened Mon Apr 18 00:00:26 2016
mithroolofk / wallento: I was actually using the pipistrello and minispartan6 for doing my testing00:24
mithroBut I'm pretty sure that it would all work on the Atlys board with my ixo-usb-jtag too00:25
mithroandrzejr / olofk: Yeah Digilent seems to use a *different* chip for doing the USB JTAG stuff on pretty every board00:25
mithroLooks like the older boards like the Baysys and Atlys where FX2 based but there are also FTDI and Atmel based boards00:28
mithroI assume its most likely because they contact their designs out to random external firms with the requirements that they can talk to the board using some type of C api00:32
mithro_franck_: morning?02:01
mithrowhat does the mor1k do if it encounters an illegal instruction?02:22
stekernmithro: it throws an illegal instruction exception02:29
mithrostekern: which will cause it to jump to an exception vector somewhere?02:30
olofkmithro: So I guess that the best way would still be if Digilent just opened up their damn protocol02:30
mithroolofk: I don't think they use the same protocol on all their boards02:30
mithroolofk: actually I'm pretty sure they don't use the same USB protocol on their boards02:31
stekernmithro: yes, 0x700 to be precise02:31
mithrostekern: so, we should put something there :)02:40
olofkmithro: Or just avoid illegal instructions :)02:42
mithroolofk: well, there are a bunch of configuration options for the cpu which need to match the options you give gcc02:44
olofkDoesn't newlib solve this for us?02:45
mithroolofk: It might, I just a monkey which is good at putting together things I don't understand :P03:22
_franck__mithro: hi03:35
olofkTrying to build mor1kx with icestorm, but it's failing to route. Any ideas on how to slim it down. Disabled caches, debugunit and mmus so far06:41
-!- zama_ is now known as zama07:10
stekernolofk: I had this "template" for a minimal baremetal setup:
stekernyou can try to disable mul/div too07:18
olofkstekern: Both caches are enabled in that one, so I guess it could be made smaller :)07:32
stekernyeah yeah, but disregard that ;)07:47
stekerncappuccino without caches is kinda useless though07:48
olofkI'm not looking for useful, just thought it would be fun to get OpenRISC running on the ice4007:49
stekernthat's the space espresso would fill07:49
olofkI just assumed that espresso is broken07:49
stekernbut not sure if that'd be smaller, faster or working07:49
stekernso, I think you're on the right path ;)07:50
stekerncaches and mmu aren't very resource hungry btw, if you disregard memory usage07:51
mithroolofk: definitely disabling things like mul/div should reduce the usage on an ice4008:11
mithroolofk: I don't ice40 has many features which make doing things like that efficient?08:12
-!- _franck_1 is now known as _franck_15:21
shorneHello, what is the longest some of you ahve run mor1k on fpga?23:37
shorneI have been seeing some weird crashes after a few days running linux23:37
shorneafter a l.jal c002092c, it actually jumps to bffa092c23:38
shornelooking at the tlb, it still has23:40
shorneitlbw0mr80 (/32): 0xC002000123:40
shorneitlbw0tr80 (/32): 0x000200F023:40
shorneso it looks like tlb isnt corrupt, also I checked memory and it looks like no corruption, the failure is a bus error (due to jump to bffa092c)23:41
shorneLast time I got a crash it had bus error bffe2ce0, when trying to jump to c0062ce023:43
shorneit seems like some mask gets applied to the hi part of the jump23:44
--- Log closed Tue Apr 19 00:00:28 2016

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