| --- Log opened Sun Nov 08 00:00:00 2015 | ||
| olofk | Anyone got the riscv32 toolchain installed? | 08:34 |
|---|---|---|
| olofk | Having some problems installing the riscv32 toolchain. | 15:29 |
| olofk | Ahh.. the elf-loader in orpsoc-cores is hardcoded to big endian :) | 21:30 |
| olofk | hesham: Just remembered that you discovered the same thing just a week ago, right? | 21:31 |
| hesham | olofk: Yeah, but that was with the Icarus/elfloader, not the or1k ROM | 21:32 |
| hesham | Anyway, I am almost done with a RISC-V SREC bootloader on Atlys | 21:32 |
| olofk | hesham: That's awesome! | 21:33 |
| hesham | It runs a led blinker program so far | 21:33 |
| olofk | I'm just adding Clifford Wolf's picorv32 core now, so it looks like we suddenly got lots of riscv support :) | 21:33 |
| olofk | cool | 21:33 |
| hesham | Maybe you would use my srec loader then :) | 21:34 |
| olofk | hesham: I saw that you asked how I was planning to upload the image with the IHEX/SREC bootloader | 21:34 |
| hesham | Yeah, I mean the host program | 21:34 |
| olofk | I just thought I could pipe the UART somehow | 21:34 |
| hesham | I am using minicom/ascii uploader | 21:35 |
| olofk | But my original plan was to implement a zmodem bootloader | 21:35 |
| olofk | That would probably be much faster | 21:35 |
| hesham | Would zmodem work with ascii files? | 21:35 |
| olofk | No, it's binary, but much faster | 21:35 |
| olofk | I realized that it would take ~1 hour to transfer a linux hex image | 21:36 |
| hesham | what about the binary format? I mean addresses, count, etc | 21:36 |
| hesham | I don't know how they're encoded with zmodem/binary files | 21:36 |
| olofk | I don't remember right now, but I read the spec... which was last updated in 1986 btw :) | 21:36 |
| hesham | Oh | 21:36 |
| olofk | Basically, zmodem was made to replace xmodem, ymodem and kermit | 21:37 |
| hesham | But from the or1k side, the rom would understand ascii, or elf, or what? | 21:37 |
| hesham | ascii=srec/Intel/hex | 21:37 |
| olofk | zmodem is basically a way to packetize a binary stream | 21:37 |
| olofk | over UART | 21:38 |
| olofk | Like TCP for the 80's | 21:38 |
| hesham | Ah, OK, I might give it a try also | 21:39 |
| hesham | But for now, I am happy with my srec loader | 21:39 |
| olofk | Yeah, I think that's great as long as the programs aren't too large | 21:39 |
| olofk | I think Arduino uses the same mechanism to upload programs | 21:40 |
| hesham | Yes, I am using it just for testing | 21:40 |
| olofk | _franck_: You've done most of the stuff on the elf-loader. Do you know how hard it would be to make it endian-aware? | 21:41 |
| hesham | Would it make sense to integrate RISC-V/cores into orpsoc-core/fusesoc repos? | 21:41 |
| hesham | Both for scripts + cores' repos | 21:41 |
| olofk | hesham: Absolutely. I think it would be great to have many cores there. This might however be a good time to change the name from orpsoc-cores to fusesoc-base, fusesoc-cores or fusesoc-standard or something like that | 21:43 |
| hesham | I totally agree | 21:44 |
| olofk | It's no problem to have the riscv cores in a separate core library either, but I think it would be cool to present a large standard core repository to the fusesoc users | 21:44 |
| olofk | It's also a bit harder to handle dependencies between many core libraries. | 21:45 |
| olofk | I already renamed orpsocv3 to fusesoc a few years ago. Should have renamed the library at the same time :/ | 21:46 |
| olofk | Oh well. This is easier. Now, please start bikeshedding what we should call the standard library :) | 21:46 |
| hesham | All the cores there would/should be wishbone compliant? Right? | 21:48 |
| olofk | Not necessarily. We got a lot of infrastructure for wishbone, but that's just because no one has bothered to do anything similar for other buses | 21:50 |
| hesham | The good thing is you've many wishbone compliant cores that can be just "plugged" and used there. | 21:51 |
| hesham | That's why I have been working on getting RISC-V core there, to use other already-there cores | 21:52 |
| olofk | Yeah. Reuse is great | 21:52 |
| olofk | One of the biggest reasons for doing FuseSoC was that I was so dead tired of everyone reimplementing stuff in their own repos :) | 21:53 |
| hesham | And of course, now a RISC-V-based fusesoc can work on other orpsoc-supported FPGA boards | 21:53 |
| olofk | Yeah. That's really cool | 21:53 |
| hesham | I believe fusesoc resolved this issue. | 21:54 |
| olofk | That's great to hear | 21:57 |
| olofk | Now we only need more cores :) | 21:57 |
| olofk | Good night | 22:04 |
| olofk | hesham: Looking forward to see your work. Both on the bootloader and the RTL stuff | 22:05 |
| hesham | olofk: Good night. The Icarus/Hello world version works fine. | 22:05 |
| hesham | I'd send an e-mail or something once I'm done with the FPGA/hello world thing | 22:06 |
| olofk | Sounds good. Thanks | 22:07 |
| --- Log closed Mon Nov 09 00:00:02 2015 | ||
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