IRC logs for #openrisc Friday, 2015-10-16

--- Log opened Fri Oct 16 00:00:28 2015
-!- Netsplit over, joins: olofk, blueCmd_, robtaylor, julzmb, jpo, clopez, kaalia, stekern, heroux, GeneralStupid (+1 more)00:08
-!- Netsplit over, joins: Sockbr, rokka, _franck_, andrzejr00:08
mor1kx[mor1kx] olofk opened pull request #32: Silence some synthesis warnings (master...master)
olofkThree more and I'll get my t-shirt13:41
mor1kx[mor1kx] skristiansson closed pull request #32: Silence some synthesis warnings (master...master)
stekernI want a t-shirt too18:02
jeffesquivelsstekern: t-shirt?18:10
wallentofor swiping bugs and warnings in mor1kx18:12
stekernwhat should it say? "I'm with moron-ekx"?18:15
jeffesquivelsI thought you guys were referring to Digital Ocean's hacktoberfest t-shirt... my mistake :)18:16
wallentohaha, nice one stekern18:21
olofkstekern: :)19:04
olofkAnd yes. The hacktoberfest thing was the reason why I decided to dust off these old patches that have been lying around.. so I'd say it works19:05
olofkAnyone who knows how bluetooth works in Linux? I compiled and loaded a bluetooth kernel driver now, but I was hoping that a bluetooth icon would pop up too19:10
GeneralStupidolofk: its long time ago i tried that... But AFAIK you need some tool like bluez-tools (debian)19:18
andrzejrolofk, does your patch fix something in the cache or is it just about warnings?19:47
stekernandrzejr: one thing you should consider if things break when you enable caches, bursting is only performed when caches are enabled19:53
stekerndo your memory wrapper handle bursts correctly?19:54
stekernone other thing you could try, set all .ENABLE_BYPASS(0) that you can find in mor1kx to .ENABLE_BYPASS(1)19:56
andrzejrstekern, probably. It passes the olofk's test.19:56
andrzejrwhat does it do?19:56
stekernenables bypass logic in the ram instantiations19:56
stekernthey *shouldn't* be needed anywhere, but just in case there's a snafu somewhere19:57
andrzejrI see. Is there any reason we are disabling these bypass paths? They look pretty harmless19:59
stekernthey are, but they introduce (unnecessary) logic20:00
andrzejrI will try that. Are you suspecting timing violations in RAM or something else?20:07
stekernno, it has nothing to do with timing violations20:14
stekernif you need to read a just written value on the following clock cycle, you need the bypass20:15
stekernbut in the places where the bypass is disabled, such a condition should not occur20:15
andrzejrI see, the RAM needs 2 cycles.20:20
andrzejrno difference, there must be some other issue21:17
andrzejrcan linux or barebox at any circumstances issue an unaligned memory access? My ddr wrapper assumes that there are no transactions crossing boundaries of 128B.21:27
--- Log closed Sat Oct 17 00:00:29 2015

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