| --- Log opened Fri Aug 07 00:00:49 2015 | ||
| andrzejr | I've added ISIM support to fusesoc but: WARNING: This is a limited version of the ISim. The current design has exceeded the design size limit for this version and the performance of the simulation will be derated. Please contact your nearest sales office at http://www.xilinx.com/company/contact.htm or visit the Xilinx on-line store at http://www.xilinx.com/onlinestore/design_resources.htm if interested in | 02:08 |
|---|---|---|
| andrzejr | purchasing the full, unlimited version of this simulator. | 02:08 |
| andrzejr | also, it does not support VPI so some modules have to be removed from ORPSoC | 02:13 |
| andrzejr | It can simulate encrypted Xilinx secureip models, though. If anyone wants to try it, I have pushed it to: https://github.com/andrzej-r/fusesoc/tree/andrzej-r | 02:16 |
| juliusb | someone needs to slap Xilinx and remind them they sell silicon, not software | 08:55 |
| stekern | I wonder how much of their revenue comes from sw licenses though | 09:48 |
| -!- Netsplit *.net <-> *.split quits: jonmasters, heroux, pecastro, zuz | 10:45 | |
| -!- Netsplit over, joins: pecastro, heroux, zuz, jonmasters | 10:49 | |
| ndrw1 | so, what is the best board for orpsoc? I see DE1 and DE0_nano are getting a lot of attention. I want have so spare capacity for application specific stuff, which is why I started with Artix7 but I'm tired with all the the tooling problems | 11:43 |
| -!- Netsplit *.net <-> *.split quits: heroux | 22:49 | |
| -!- heroux_ is now known as heroux | 22:49 | |
| andrzejr | All three Icarus verilog bugs that prevented compilation of the new MIG DDR2 I/F are now fixed in git. These guys are fast. | 22:57 |
| andrzejr | Obviously the encrypted modules do not work but I can disable PHY (they are all related to Serdes and phase interpolators) and at least simulate the system-side of the DDR2 I/F. | 22:58 |
| --- Log closed Sat Aug 08 00:00:50 2015 | ||
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