--- Log opened Tue Jul 14 00:00:15 2015 | ||
-!- Netsplit *.net <-> *.split quits: mithro, trevorman | 18:30 | |
-!- trevorman_ is now known as trevorman | 18:31 | |
Schrostfutz_ | If I were to write a VM for the openrisc instruction set, could I generate code for it or would I have to also understand the ELF-header? | 20:24 |
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poke53281 | you can generate bare metal code. and you can extract the code from the generated elf file via the objcopy program. | 20:32 |
poke53281 | You don't have to understand the elf format | 20:32 |
Schrostfutz_ | poke53281: that sounds nice. Do you think writing a small vm for the basic instruction subset is a difficult exercise? | 21:34 |
poke53281 | It depends on your experience. In principle not. The problems are the subtleties | 21:50 |
Schrostfutz_ | poke53281: okay, thank you! | 21:50 |
poke53281 | at least there are three instruction set emulators for Openrisc: or1ksim, qemu and jor1k | 21:51 |
poke53281 | This is (almost) a complete implementation, which is able to run Linux: https://github.com/s-macke/jor1k/blob/master/js/worker/or1k/safecpu.js | 21:53 |
poke53281 | for bare-metal code only the last 500 lines are really important. | 21:56 |
poke53281 | take a look in the architecture manual https://github.com/openrisc/doc/blob/master/openrisc-arch-1.1-rev0.pdf?raw=true | 21:58 |
poke53281 | search for l.ori | 21:58 |
poke53281 | Then look at line 722 in safecpu.js and try to understand it. | 21:58 |
--- Log closed Wed Jul 15 00:00:16 2015 |
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