| --- Log opened Mon May 04 00:00:21 2015 | ||
| --- Day changed Mon May 04 2015 | ||
| CodeWar | So when a decoder says its taking 5 cycles to decode an instruction does it mean it has 5 always blocks doing parts of the decode cycle? | 00:00 |
|---|---|---|
| CodeWar | where can I find the Verilog source for a full CPU that is part of the OpenRisc project | 00:03 |
| olofk | stekern: Why the two u-boot images in the example from yesterday. Is one of them just payload (e.g. Linux)? | 10:15 |
| olofk | ah yes. That's it | 10:21 |
| bandvig | stekern: I'm continue learning cappuccino pipe, namely implementation of RF. I see there is option to implement shadow GPRs, but there isn't applying an offset to GPR addresses to access a GPR block other than #0. Does that mean that the GPR shadowing option isn't completed? | 12:48 |
| olofk | bandvig: No expert here, but I think you can access the others through SPRs | 13:50 |
| bandvig | olofk: let me clarify. I don't need access to either shadowed GPRs or to fast context switching. I'm just asking about actual status of the features. | 13:54 |
| stekern | olofk: yes, uImage is just an 'application' image format u-boot uses | 16:13 |
| stekern | bandvig: none of the context switching stuff is implemented, but you can access the second set of GPRs by SPR accesses (as olofk said) | 16:14 |
| stekern | the reason I added them is that even without the automatic context switch, you can still manually use them in exception handlers to save away regs | 16:15 |
| stekern | and for Linux SMP, they are needed, since there are no other place to temp store the regs when you need to switch to the kernel stack | 16:16 |
| bandvig | stekern: thanks, I've understood | 16:19 |
| olofk | stekern: Do you know anything more about the image format that uboot uses? I was thinking earlier today that uboot must have the same problem that we're trying to address with bin2binsizeword | 19:50 |
| olofk | Would be nice to be able to reuse something existing. bin2binsizeword is nice and simple, but it is a hack | 19:50 |
| olofk | Seems like they just add a header | 19:52 |
| stekern | yes, but the images can be compressed as well | 19:53 |
| olofk | We don't need to support that | 19:53 |
| stekern | true | 19:54 |
| olofk | As I've added SPI Flash support to the de0 nano testbench, I could play around a bit with it | 19:54 |
| olofk | Still haven't managed to boot from the SPI Flash on a real board yet :( | 19:55 |
| olofk | The FPGA is loading, but nothing is written to RAM | 19:56 |
| olofk | ehmm.. what is the PC doing at 0xEFFFFFFC ? | 19:58 |
| olofk | Starting to suspect that my boot ROM isn't fully working | 20:02 |
| stekern | you jumped too long backwards? | 20:26 |
| olofk | AHh.. fuck! I forgot that the regular wb_ram doesn't work for Altera | 20:32 |
| olofk | Woohoo!! It's working | 20:35 |
| --- Log closed Tue May 05 00:00:36 2015 | ||
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