IRC logs for #openrisc Monday, 2015-05-04

--- Log opened Mon May 04 00:00:21 2015
--- Day changed Mon May 04 2015
CodeWarSo when a decoder says its taking 5 cycles to decode an instruction does it mean it has 5 always blocks doing parts of the decode cycle?00:00
CodeWarwhere can I find the Verilog source for a full CPU that is part of the OpenRisc project00:03
olofkstekern: Why the two u-boot images in the example from yesterday. Is one of them just payload (e.g. Linux)?10:15
olofkah yes. That's it10:21
bandvigstekern: I'm continue learning cappuccino pipe, namely implementation of RF. I see there is option to implement shadow GPRs, but there isn't applying an offset to GPR addresses to access a GPR block other than #0. Does that mean that the GPR shadowing option isn't completed?12:48
olofkbandvig: No expert here, but I think you can access the others through SPRs13:50
bandvigolofk: let me clarify. I don't need access to either shadowed GPRs or to fast context switching. I'm just asking about actual status of the features.13:54
stekernolofk: yes, uImage is just an 'application' image format u-boot uses16:13
stekernbandvig: none of the context switching stuff is implemented, but you can access the second set of GPRs by SPR accesses (as olofk said)16:14
stekernthe reason I added them is that even without the automatic context switch, you can still manually use them in exception handlers to save away regs16:15
stekernand for Linux SMP, they are needed, since there are no other place to temp store the regs when you need to switch to the kernel stack16:16
bandvigstekern: thanks, I've understood16:19
olofkstekern: Do you know anything more about the image format that uboot uses? I was thinking earlier today that uboot must have the same problem that we're trying to address with bin2binsizeword19:50
olofkWould be nice to be able to reuse something existing. bin2binsizeword is nice and simple, but it is a hack19:50
olofkSeems like they just add a header19:52
stekernyes, but the images can be compressed as well19:53
olofkWe don't need to support that19:53
olofkAs I've added SPI Flash support to the de0 nano testbench, I could play around a bit with it19:54
olofkStill haven't managed to boot from the SPI Flash on a real board yet :(19:55
olofkThe FPGA is loading, but nothing is written to RAM19:56
olofkehmm.. what is the PC doing at 0xEFFFFFFC ?19:58
olofkStarting to suspect that my boot ROM isn't fully working20:02
stekernyou jumped too long backwards?20:26
olofkAHh.. fuck! I forgot that the regular wb_ram doesn't work for Altera20:32
olofkWoohoo!! It's working20:35
--- Log closed Tue May 05 00:00:36 2015

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