--- Log opened Fri Apr 10 00:00:59 2015 | ||
stekern | _franck_: you have a de1 right? | 00:17 |
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stekern | what kind of sdram is there on that? | 00:18 |
stekern | was there some important difference between it and the one on de0 nano? | 00:18 |
stekern | getting more familiar with the de1 minimig port, I'm not sure why he opted to use a "qmem bus" instead of wb. it's only running off TCM until it has copied the real code into SRAM. | 04:34 |
olofk | stekern: So using wb would just add some extra cycles during boot? | 06:35 |
stekern | yes | 06:53 |
olofk | Sounds like there might be other areas that might benefit more from optimizing memory access latencies :) | 06:55 |
stekern | then there's a very odd sdram interface, where or1200 is hooked up to a 7Mhz slave interface | 06:55 |
olofk | Is the sdram interface 7MHz? | 06:56 |
stekern | no the sdram interface is 114MHz, but the slave side is 7MHz | 06:58 |
stekern | but the sdram interface is only used to load the data that the 68k is using on the de1 | 07:00 |
stekern | but I need to run code from it, since I don't have a SRAM | 07:00 |
stekern | or1k code that is | 07:00 |
olofk | And you need more than what you can fit in a few block RAM? | 07:12 |
stekern | the binary is 105k | 07:13 |
stekern | but they have a cool bootrom that can load from sdcard, that's under 4k | 07:15 |
stekern | https://github.com/rkrajnc/minimig-de1/tree/master/fw/ctrl_boot | 07:16 |
olofk | ' | 07:16 |
olofk | Awesome! That's perfect for my bootloader collection | 07:16 |
olofk | Does it use the opencores sd controller? | 07:17 |
stekern | haha, no... | 07:17 |
stekern | everything is NIH | 07:17 |
stekern | it uses SPI | 07:18 |
stekern | to access the sdcard | 07:18 |
olofk | :) | 07:18 |
stekern | the SPI controller is custom | 07:18 |
olofk | FFS | 07:18 |
stekern | https://github.com/rkrajnc/minimig-de1/blob/master/rtl/ctrl/ctrl_regs.v | 07:19 |
stekern | spi, uart and timer all in one | 07:19 |
stekern | it kind of makes sense, they are lightweight | 07:20 |
stekern | the soc is pretty big, it takes almost all of de0 nano | 07:23 |
olofk | Managed to build it already? | 07:25 |
stekern | yes, I'm currently debugging why the sdram interface isn't working... | 07:26 |
stekern | I glued a microsd->sd adapter to a veroboard and soldered a couple of wires to a pinheader connected to the de0 nanos extension headers yesterday too | 07:29 |
stekern | much better than trying to hook up an actual sd/microsd slot | 07:31 |
_franck__ | stekern: I do have one. The ram is an SDR-SDRAM, not much different that the one on the de0 | 07:31 |
stekern | ;) | 07:31 |
olofk | haha. Glue and solder keeps OpenRISC ticking :) | 07:42 |
olofk | hey verilator experts. Why am I getting errors with VerilatedVcdC? http://pastebin.com/FDup8AVH | 09:02 |
olofk | aha! --trace did the trick | 09:08 |
stekern | odd thread from the newlib repo... | 09:40 |
stekern | toti1399 seems to be some troll/bot | 09:41 |
stekern | cool, seems like my glue and solder works, it has loaded something that looks right into the sdram and is running it now | 10:57 |
stekern | a function that's called FatalError(), sounds promising ;) | 10:58 |
stekern | ah, now I have uart output too. the kick.rom file is missing on the sd card | 11:35 |
olofk | haha. The age-old problem :) | 11:35 |
olofk | But you could just get it from one of your legal sources as usual :) | 11:35 |
stekern | indeed | 11:36 |
olofk | Maybe solder a real Amiga ROM to your veroboard instead :) | 11:36 |
stekern | if it were c64, I actually could, I have a couple of them in my bookshelf | 11:36 |
olofk | ROMs or complete c64? | 11:37 |
stekern | complete c64 | 11:37 |
stekern | or, at least one that is complete and working | 11:37 |
olofk | You haven't even stolen the SID? | 11:37 |
stekern | nope, but I have from another one | 11:37 |
stekern | non-related, but I'm trying out i3wm, still haven't got completely frustrated with it | 11:40 |
stekern | all other tiling window managers I have tried in the past have had some annoyance that has made me loose patiance with them | 11:41 |
stekern | either the default hotkeys has been non-sensible (and I want the defaults or at least something close to it). or it has been a pain and non-intuitive to reorganize the layout in the middle of things | 11:43 |
stekern | http://oompa.chokladfabriken.org/skarmskjut/i3wm-2.png | 11:45 |
olofk | nice | 11:47 |
olofk | I've finally made the first step to make the Parallella FuseSoC-compatible | 12:15 |
olofk | One of the subcomponents can now be simulated with Icarus, Modelsim and Verilator | 12:15 |
stekern | nice | 12:22 |
olofk | stekern: Is the ROM kicking yet? | 18:50 |
stekern | mnja | 18:50 |
stekern | I can read it, but there's something off with my address decoding | 18:50 |
olofk | Do you run it on a de0 nano now btw? | 18:52 |
stekern | I've split the SDRAM into two 16MB parts, where the upper 16MB is used for what the SRAM on the de1 board (i.e. or1k main mem) and the lower 16MB is for the 68k and minimig | 18:52 |
olofk | aha | 18:52 |
stekern | but it accesses the upper 16MB even when I try to access the memory area that should be mapped to the lower | 18:53 |
stekern | yes, I'm running on de0 nano now | 18:53 |
stekern | http://1drv.ms/1Fv1d45 | 18:54 |
olofk | Sounds like one of those silly little hard-to-catch errors with a bit index error or a slightly wrong-sized wire | 18:54 |
olofk | haha. Cool. Is that an RJ45 connector you have glued the SDCard to? :) | 18:55 |
olofk | And is the right board connected to a TAC-2? | 18:56 |
olofk | Might if I share the pic on twitter? | 18:56 |
stekern | yeah, I probably have made an error on which bit I select the upper or lower somewhere | 18:57 |
stekern | no, it's a PS/2 connector | 18:57 |
stekern | I'm going to connect that as well to the GPIO header | 18:57 |
stekern | the right board is my "orsoc debugger extension board" | 18:57 |
stekern | for tac-2 I need to find some old PC motherboard with d-sub connectors to steal from | 18:58 |
stekern | I have one old motherboard (that's where the dual PS/2 connector comes from), but I have already used the d-subs from that to build a tac-2->usb converter | 19:00 |
stekern | and share if you want to ;) | 19:00 |
olofk | You should get yourself a twitter account. This isn't the first time I'll mention some cool stuff that you have made :) | 19:00 |
stekern | yeah, I should... | 19:01 |
olofk | Or Lunarstorm :) | 19:06 |
stekern | or https://irc-galleria.net/ | 19:07 |
stekern | finnish lunarstorm | 19:07 |
stekern | think I found my address problem | 19:13 |
stekern | a 32->16 downsizer module had parametrizable address widths, but it didn't use them | 19:14 |
stekern | instead it hardcoded the default parameter value at some places | 19:14 |
olofk | stekern: Whoops. I think I'm guilty of that in some of the Wishbone modules I've done. Was it one of them? | 20:15 |
stekern | no, it was in a "qmem_bridge" module | 20:23 |
--- Log closed Sat Apr 11 00:00:01 2015 |
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