IRC logs for #openrisc Friday, 2014-12-19

--- Log opened Fri Dec 19 00:00:17 2014
_franck__any systemc user here ?08:25
wallento_franck_: yes08:54
_franck__question from a newbie: I have a wishbone master with a wb_adr port which is a sc_lv<32> (or sc_uint). I my top simulation file, I want to connect wb_adr[0] to my DUT wb_adr wich is defined as a sc_in<bool> (generated by verilator)08:59
_franck__how do we do that ?08:59
_franck__I can't find any implicit casting from sc_uint ot sc_lv to bool09:00
wallentofirst of all you should avoid sc_lv09:01
wallentothis has some performance issues09:01
wallentowhy is wb_adr bool?09:01
wallentoit should all bei uint32_t09:01
_franck__because it is one bit wide and verilator generates it as bool09:02
_franck__wait I'll show you09:02
wallentoyou can force it to be unsigned int09:02
_franck__cool, so tell me how :)09:03
wallentoyes, in a sec09:03
wallentoneed to find it in the verilator documentation :)09:03
wallentothis is the one that helps you in your case: /*verilator sc_bv*/09:05
wallentoUsed after a port declaration.  It sets the port to be of sc_bv<width> type, instead of bool, vluint32_t or vluint64_t.  This may be useful if the port width is parametrized and different of such modules interface a templated module (such as a transactor) or for other reasons.  In general you should avoid using this attribute when not necessary as with increasing usage of sc_bv the performance increases significantly.09:05
wallentoI still search for the setting that avoids bool and uses uint32_t instead09:05
wallentommh, I think this needs to be done manually, which is kinda ugly09:07
wallentohow does your testbench look like?09:08
wallentodo you generate 32 bit addresses?09:08
wallentoand connect the gpio module to a bus or so09:09
_franck__yes, my wb_master has a 32 bit wb_adr signal09:09
wallentothen I would recommend adjusting gpio's wb_adr_i to the bus address width09:09
wallentoand only use sc_signal<uint32_t>09:09
wallentothe problem is you cannot simply attach an sc_in<bool> to an sc_signal<uint32_t> on bit zero09:10
_franck__I wanted something generic. I don't want to touch anything in gpio.v. I'm setting up a test environment for bare metal drivers09:10
wallentoof course you could overload it..09:10
wallentothen you need some process to convert this09:11
wallentothe problem is: why is this a single bit?09:11
_franck__I'll run the test on or1ksim, then drive a wb_master to control the verilated ip09:11
wallentois it like bit 31?09:11
_franck__because gpio.v use only two registers09:11
wallentoah, line two then09:11
wallentowait a minute, I will think about it09:12
wallentoor1ksim output is also uint32_t, correct?09:13
_franck__it is09:13
_franck__well, it's something else but, whatever it's not a problem here09:14
wallentobut its arithmetic and not sc_bv, correct?09:15
_franck__or1ksim (when used as a lib)  use a function like this generic_read(void *class_ptr, unsigned long int addr, unsigned char mask[], unsigned char rdata[], int data_len) to read something09:15
_franck__so it's pure c++ so after that, I'll interact with my systemc wb_master from this function09:16
_franck__only c++ here09:16
wallentothis one: --pins-sc-uint09:26
wallentono, also not, mmh, I was quite sure there is a flag that can make 1 bits a uint32_t09:28
wallentoif we really cannot force verilator to generate a uint32_t port for one bit wires, we need an extra process that does this09:29
wallentommh, I just came to that we cannot avoid this at all09:30
wallentoI assume gpio adr must be connected to bit 2 of the bus, correct?09:30
wallentoI would put a verilog wrapper around the module09:31
wallentoand have the wrapped adr mapped to input adr_i [2]09:31
_franck__ok, good idea, thanks for your help09:33
olofkI've been thinking about this. I wonder if we should always make wb_adr 32 bits for all slaves09:57
olofkI usually make it smaller to avoid some warnings, but there are benefits with keeping it 32 bits09:58
olofkAn IP-XACT model must have a fixed width, I think. And VHDL records (prior to 2008) must have a fixed width too09:58
olofk_franck__: What are you doing btw? Are you trying to use or1ksim together with verilog peripherals in verilator?09:59
_franck__olofk: yes10:00
olofkAWESOME!!! I've been thinking about that for YEARS!10:00
_franck__so we can check the core _and_ the software lib (a.k.a baremetal driver) at the same time10:01
olofkYes, I love it!10:01
stekern_franck__: is your house ready renovated now? ;)10:02
_franck__not at all, just doing this during my day job ;)10:03
stekernah, nice ;)10:04
_franck__you tell that to my boss :)10:05
olofkI'm wondering if there's something fishy with the JTAG connection here19:05
olofk_franck__: Why is the expected tap ID set to 0x14951185 for the Mohor tap in the OpenOCD scripts, while it's set to 0x149511c3 in the code?19:08
olofkI noticed that the difference is that the manifacturer part is shifted one bit. Not sure if that's relevant19:08
olofkhmm.. or is it shifted...?19:10
olofkI can't understand how JTAG so often works. It seems like a complete mess to me19:10
olofkaha... it was set to 0x14951185 in the orpsocv2 fork19:17
olofkhmm... was there some shifting bug in one of the implementations?19:18
_franck__olofk: yes there was something like this19:45
olofk_franck__: Should the one in the scripts be changed? (guess it's not a big deal, but still)19:46
olofkA bigger problem is that I can't hook up gdb to icarus via openocd and jtag_vpi anymore19:47
olofkopenocd connects fine and halts the CPU, but nothing happens when I connect gdb19:47
olofkI remember it was slow, but I think it used to at least work19:47
_franck__did you try with mor1kx generic ?19:49
olofkRunning it right now19:50
_franck__cant help you that much iam afk right now19:51
olofkYeah. Me too. It's not like I'm sitting home alone on a friday night and trying to set up a JTAG connection to a simulator19:52
_franck__what does gdb say ?19:52
olofkIt's a friend who's asking19:52
olofkI had remotetimeout set to 100, and gdb doesn't say anything at all. When I set it back to 2, I get timeout and packet errors19:53
olofk...said my friend19:53
_franck__iam about to wath the hobit. it has been years since i didnt go to the cinema at night19:54
_franck__did you look at the wabeform ?19:55
_franck__is jtag alive ?19:56
_franck__ah yes you told me openocd is ok19:56
_franck__ypu know it is super long. did you wait enough ?19:57
olofkYeah, it might be that I should wait longer. I'll look at the waveform first to see if I can spot anything obvious.20:03
olofkSaw the first Hobbit movie in the cinema, but I haven't been away since I got kids20:03
olofkhmm.. adding some debug printouts to OpenOCD. Everything looks fine. It reads back registers 0-34 (32 gprs + npc + ppc + version reg?)20:14
olofkBut I do get a warning "Debug: 332 3890 log.c:422 keep_alive(): keep_alive() was not invoked in the 1000ms timelimit (2788). This may cause trouble with GDB connections."20:15
olofkand this is before I even have connected gdb20:17
olofkCould it be that jtag_vpi isn't reading from the buffer fast enough so openocd has to wait and spends more than 1000ms between running the keep_alive function20:18
olofkhmm... OpenOCD connects to the real target as well now, but GDB fails to connect to OpenOCD21:05
olofkAnd there aren't any messages at all in openocd to indicate that gdb tries to connect21:05
olofkNewlib 2.2.0 was released. The changelogs mention or1k, but is this all the patches?21:08
olofkDiffing wallento's tree against 2.2.0. Seems to differ on some OpenRISC stuff21:20
olofk_franck__: For some reason it works much better when I connect to port 3333 instead of 555521:43
olofkTime to consult the great IRC archive to remind me how to use this thing21:45
olofkA little embarrasing detail is that 90% of the results when searching for gdb in the IRC logs results is me trying to figure out how to connect/load files/read memory.21:51
olofkIsn't si supposed to execute just one instruction?22:30
olofkgdb just hangs after executing that22:30
olofkBut after Ctrl-C it looks like I end up somewhere else22:31
olofkI vaguely remember people having problems with single-stepping. Could this be related?22:32
olofkWhaaaat!!!!?!?!?! It looks like my DDR2 controller works on the board first time I tried it22:33
-!- _franck__ is now known as _franck_22:55
olofkDoes anyone have some minimal assembler code for setting up the uart and printing something?22:56
olofkOh well. This is enough social activitites for me. Good night22:59
--- Log closed Sat Dec 20 00:00:19 2014

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