IRC logs for #openrisc Thursday, 2014-08-28

--- Log opened Thu Aug 28 00:00:26 2014
poke53281X and wayland I haven't tried yet. They compile at least.00:12
poke53281scummvm is 1.6.001:52
stekernI tried 1.7.0, but it crashes with an unaligned access02:38
stekerndon't now if it's related to that version02:39
stekern*know02:39
poke53281I checked for unaligned access. No problem while running monkey island 1 amiga demo02:45
poke53281without sound02:45
stekernI'll give 1.6.0 a go02:51
stekernbut whatever the outcome of that is, I'll investigate this crash later02:52
poke53281By the way. Interesting article. http://www.extremetech.com/extreme/188396-the-final-isa-showdown-is-arm-x86-or-mips-intrinsically-more-power-efficient03:00
stekern1.6.0 doesn't crash03:04
poke53281Hmm, then it's probably nothing severe03:10
stekerncould be a scummvm bug03:11
stekernrunning mouse events over the network didn't work too well03:11
stekernmaybe I should have said, running them over my hack over the network03:12
poke53281Didn't even know that there is a driver for this. Or do you use vnc?03:12
stekernit works but is slow as hell03:12
stekernnot a specific driver, I use a hacked-up hack I found on internet to write uinput events from stdin03:14
stekernand then on or1k: nc -l -p 12345 | uinput03:14
stekernand on my ws: cat /dev/input/by-id/usb-Logitech_USB-PS_2_Optical_Mouse-event-mouse | nc 192.168.255.142 1234503:15
stekern...or the keyboard03:15
stekernkeyboard works fairly well03:15
poke53281Ahh, Ok. I expect a speed which is good. If you do cat /dev/input/eventX the amount of data is not that much.03:15
poke53281even for a mouse03:16
stekernactually it does, there was a brainless 1ms sleep between each event in the hack03:18
stekernhttp://code.google.com/p/nethid/03:18
poke53281:)03:19
stekernhttp://pastie.org/950883503:20
stekernmy version to make events from a 64-bit little-endian machine work on a 32-bit big-endian03:20
poke53281looks easy. But in the long term an vnc server would be better I would say.03:21
stekerna vnc connection isn't really what I want though03:24
stekernunless you mean to write a vnc-server that mimics that functionality, and without transferring any display data03:25
stekernbut if you need to do that, it's probably easier to improve the hack I'm using03:27
stekernand write a small server/client, where the client would grab the mouse and keyboard and direct them to the server03:28
poke53281no, I mean a fully functional server. Transfer just the mouse is kind of senseless. If you run out of usb plugs or ps2 connectors you should use a hub.03:28
stekernwell, if you want that, just run a vnc-server... but that's not what I need03:29
poke53281I emulate the simplest touchscreen driver I could find and which I can use with the dts file.03:29
stekernand this isn't related to running out of usb plugs or ps2 connectors, I don't have usb nor ps2 connected to the or1k core at all03:31
stekernso, I need something that gives me mouse and keyboard that functions exactly like if they were attached to the or1k soc03:35
poke53281Ok, I thought, that you already a sort of emulation for the mouse03:36
poke53281is the framebuffer implemented in the same way?03:37
poke53281cat /dev/fb0 | nc .......  ;)03:40
stekernno, why would I do that? ;)03:49
stekernI have access to the vga dac from the fpga03:50
stekernI actually *don't* have access to a eth phy from the fpga, so I get network via the ARM hps03:52
poke53281I don't know the options you have with an FPGA. I suppose you can also define some mmio areas where you can write an emulation if this area is accessed.04:16
stekernyes, that would work, but I opted for an easy/generic solution04:30
stekernwhere I crossconnect 2 macs04:31
-!- NegativeForty is now known as FreezingCold05:43
poke53281blueCmd: I make significant progress with asynchronous loading of files for my emulator. Tried to use it to boot Debian. http://jor1k.com/debian/jor1k-master/06:45
poke53281I come pretty far06:46
poke53281Maybe you have an idea of the current error. Or is this already the udev error?06:47
poke53281I cannot start stage2 of the debootstrap yet. (Kernel too old)06:47
poke53281blueCmd: Do you have a bootstrapped tar.xxx file on the server which is already patched?07:17
olofkThere should be a led blinker for de0_nano somewhere...09:38
olofkI assumed writing directly to 0x91000000 should light up the LEDs, but that doesn't seem to work09:39
blueCmdpoke53281: patched in what way?09:45
stekernolofk: you need to set the direction to output too09:51
stekern*((uint8_t *)0x91000000) = 0xff; *((uint8_t *)0x91000001) = 0xff;09:52
olofkaha. That saved med som googling09:52
olofkUndefined command?09:53
olofkahh. forgot the set :)09:53
olofk"No symbol table is loaded". What's this..?09:54
stekernwhat are you doing? setting from gdb?09:55
olofkyes09:55
stekerns/uint8_t/char09:55
olofkAh.. forgot to mention that :)09:55
olofkwoohoo!!!09:56
olofkWhy doesn't writing an int work?09:58
LoneTechpresumably the 8-bit device decodes which register to access based on the bus address09:58
LoneTechand the bus width translator doesn't convert multiple byte enables to multiple accesses10:00
LoneTechwhen going from 32-bit bus to 8-bit10:00
LoneTechthough if it did work, you'd probably need to set 0xffff0000 or 0x0000ffff anyway10:01
olofkYes, I tried both those combinations10:01
olofkBut you're right. The arbiter is a bit too stupid here10:01
olofkI wonder if this should be considered a bug10:02
olofkOr how is this handled on other SoCs?10:02
LoneTechit's not unusual to have SFRs that must be accessed in specific modes10:02
olofkah ok. Then I probably won't do anything about it10:03
olofkAt least not now10:03
olofkmaxpaln: I'm here today to hold your hand through the land of FuseSoC (also known as the Swamp of Sadness)10:04
olofkSo if you need to blink some LEDs, just ask me10:05
stekernolofk, the LED maestro10:08
maxpaln:-) I would LOVE to be at the stage of blinking LEDs!!10:09
maxpalnolofk: thanks - I may well call on your expertise.10:09
olofkHow do I set the npc from gdb? spr npc is deprecated, right?10:41
stekernolofk: set $pc=10:50
olofkc00l10:50
maxpalnThese are good tips :-) I haven't used GDB very much before and have never actually tried to use it on any HW until now. It is nearing the top of the todo list (after the shift to the newest code) - out of interest, what cable connection would work best I was planning on getting one of these http://www.ftdichip.com/Products/Cables/USBMPSSE.htm to allow USB to JTAG comms.11:00
olofkmaxpaln: I think it's basically a question if OpenOCD supports it (which I suspect it will), so search through the openocd docs11:04
maxpalncool - thanks.11:04
olofkOr consult altavista11:04
LoneTechftdi mpsse jtag comms is fairly common; you can use it directly with urjtag or openocd. the wiring is in figure 3-1 in the datasheet for that cable, and you'll likely want the 3.3V. note that some FPGAs run lower voltages still11:05
maxpalnLoneTech: thanks, ours is still 3.3V - I'll read through the openocd docs anyway but it sounds as though this is a good option.11:06
stekernmaxpaln: to what extent does lattice support hooking up user logic to the (native) jtag chain11:50
stekern?11:50
stekernand what kind of programming solutions do you usually use?11:50
maxpalnstekern: two questions there, i'll answer the last one first as its the easiest:12:08
maxpalnWe have a broad range of programming tools and utilities that work via JTAG using one of our standard JTAG programming cables.12:09
maxpalnThe DIamond Programmer is the latest incarnation but if any of you have used our devices before you may have used ispVM System. Both of these can be used as a generaic JTAG programming utility for any device - I have anumber of customers using our tools for Xilinx devices for example.12:10
stekernok, you should check if those are supported in openocd, they might be ;)12:11
maxpalnGood point - worth checking!12:11
maxpalnAs for the methods provided for hooking user logic to the JTAG chain, we provide a primitive that can be instantiated in the design. This primitive has a set of JTAG ports that mimic the incoming data - but due to the way this works it is necessary to shift in some custom instructions to enable the additional ports. Or put another way, by default you wouldn't see the JTAG activity in the12:12
maxpalndesign until you first send some specific coammands to the FPGA.12:12
maxpalnIt is for this reason that I was planning on using a simpler approach - I will just route the JTAG wires from a USB to JTAG cable to some GPIO on the FPGA and hook up the JTAG ports from the JTAG TAP Controller to these same GPIO ports. Is there any reason why this won't work?12:13
stekernno, that will work fine12:13
stekernI'm just asking out of curiousity ;)12:14
maxpalnIt is for this reason that I was planning on using a simpler approach - I will just route the JTAG wires from a USB to JTAG cable to some GPIO on the FPGA and hook up the JTAG ports from the JTAG TAP Controller to these same GPIO ports. Is there any reason why this won't work?12:14
maxpaln:-)12:14
maxpalnThis will allow me to get something working - then I can look into making things more seamless with our JTAG primitive12:15
maxpalnOn the subject of the new wb_intercon arbiter. From what I can see, I should be able to remove the old arbiter from my orpsocv2 orpsoc_top and replace it with the new wb_intercon module. This would allow me to make one small change that I can validate in Simulation and HW. It would also get me almost all the way to the latest code - I would just need to upgrade use the latest versions of the12:17
maxpalnperipherals, if any have changed.12:17
maxpalnThis would make the process of adding support into fusesoc for our tool flow a lot easier since I will have a known working starting piont.12:18
maxpalnLet me know if I have missed any fundamental problems that will prevent this from working :-)12:19
stekernright, and swapping the arbiters are basically just ripping out the old code, add the `include and change signal names12:20
maxpalnyep, that was my conclusion - great, this should be straight forward,12:20
maxpalnOn a related note, one of my background tasks is to get the clock speed as fast as possible. I am expecting comparable rates to something like the Spartan 6 on the Atyls board12:22
maxpalnDo you know what Fmax the wishbone clock can ran at on these boards?12:22
stekernit depends on the peripherals12:24
maxpalnfair enough - I am keeping things basic, SPI, UART and my memory controller. Tha latter can run quick so I am expecting the rest of the system to be the limiting factor. With little effort I have got to 75 MHz.12:25
stekernok, on a similar SoC setup on a cyclone iv, I've got around 85 MHz with the mmu enabled12:26
maxpalnOk, well that is comparable.12:27
stekern100MHz with the mmu disabled12:27
maxpalnok. The longest paths appear to be from the MMU, through the cache and back to the MMU - so that fits with your variation due to the MMU enabled/disabled.12:28
stekernyes, and it's not really possible to cut that path away, so to optimize it you'll need to optimize the surrounding logic12:29
stekernwell, of course it's *possible*, but not without taking a toll on performance12:31
maxpalnYeah, when I saw the longest path I figured that reducing the logic levels here would be tricky. Might be worth looking a little later - I get roughly 14 logic levels at the moment. Reducing this by a few would make a significant difference. It might be possible to tweak how the code is written a little - I'll mark it down as a job for later.12:31
maxpalnthere may even be scope to floorplan some of this logic to keep it closer together - it's not the most portable solution but some of the routing delays are pretty big so keeping things closer may have a significant impact.12:33
stekernyeah, I have never went down that route, since I've been mostly interested in generic optimizations that will be beneficial across platforms12:36
maxpalnyeah, that is the better approach - but for a specific FPGA/PCB there can be significant gains by helping out PAR. I'll look into it and let you know if I make any progress.12:38
stekernsounds good13:03
maxpalnPutting together a wb_intercon.conf file14:15
maxpalnI am using the atlys version as a guide14:15
maxpalnI can see some slaves have the datawidth set and others don't - is there a rule for this?14:16
stekern32-bit is default, so it might be omitted on slaves that are 32-bit14:52
poke53281blueCmd: Just the three patches in the README. inittab, noswap, ...15:48
poke53281And if you know a one-liner to let the boot process ignore the udev-related bug you told me, this would be great as well.15:51
poke53281but not necessary. For now it is enough if I come in the boot process to the same state as you are.15:52
blueCmdpoke53281: no and no sadly, I never got it pas the udev thing15:58
poke53281no problem. I will ask you in approx 0.0016 centuries again. ;)16:09
poke53281But it would be great to have a online bootable Debian.16:10
olofkmaxpaln: Are there any documentation for how to use the Lattice JTAG primitive, or is that a proprietary interface?16:10
poke53281I have worked hard to implement a very efficient filesystem to make even Debian usable on a website without downloading 200MB.16:11
olofkI think that both the Xilinx and Altera protocols were reverse-engineered, but it would be nice to not have to go down that route16:11
olofk_franck_: Which port does openocd use for uart?17:01
olofkAnd where the hell can I read about this? I found the gdb, tcl and telnet ports by trying a few ports17:04
olofkYes! 777717:19
olofkFuckin' A! It works. Got a hello world17:21
olofkAnd linux is booting17:23
olofkGot some garbled output though17:23
stekernolofk: yes, me and _franck_ got that too, so it's 'normal'. We never got to the bottom of it, but the guess is that it's something in adv_debug sys18:08
olofkstekern: Something like this? ^@-/bin/?: not f/ # ?18:18
stekernyes18:19
olofkThe kernel output looks all ok, but it looks like it's starting to mess up when busybox is started18:19
olofkFreeing unused kernel memory: 1656K (c030a000 - c04a8000)18:19
olofkinit stusyBox vit (20147:52:52 Configurback dev18:19
olofkPleaseer to achis consifconfigFADDR: Nevice18:19
stekernyes, more precisely when the irq is turned on18:20
olofkaha18:20
olofkCan I cut the IRQ line and use polling instead?18:21
stekernwait, I'll dig up the old conversation18:21
stekernbut, yes, I think you can18:21
olofkgreat x 218:21
olofkI should try to simulate this with openocd connected to icarus too18:24
olofkMight be crazy slow though :)18:24
stekernok, here's about where the old conversation me and _franck_ had: http://juliusbaxter.net/openrisc-irc/%23openrisc.2014-06-17.log.html#t05:3918:26
olofkThanks18:26
olofkweird. If I press Ctrl-c, I get a good prompt18:56
stekernI think that is consistent with what I saw too19:11
olofkReading through the quite comprehensive adv_debug_sys docs, it looks like there are a lot of potential differences from a true uart1655019:29
olofkMaybe this is the time to finally try out signaltap19:30
olofkOr is that included in the web edition?19:30
olofkOr perhaps diila19:44
stekernsignaltap is included in the web edition19:46
olofkWhat's the binary called?19:47
olofkOnly used the Xilinx equivalent before19:48
olofknevermind. used the gui instead19:49
stekernfor future reference, it's quartus_st19:51
olofkcool19:58
olofkFinding signals wasn't that easy20:04
olofkMight be a better idea to use the pre-synthesis netlist20:17
olofkfuck it. OpenOCD steals the JTAG connection20:25
olofkand why isn't my fancy USB-UART adapter showing up in /dev?20:52
olofklsusb finds it20:53
olofkAha. I have disabled the kernel driver. Who would have thought20:55
olofkCool. I could use enable it, build the kernel and run make modules_install without rebooting20:59
olofkno UART output21:05
olofkWas there a special pinout for the de0_nano image in last year's workshop?21:05
olofkand the answer is yes!21:06
olofkFinally!21:16
hesham1olofk: Please check the latest opened issue at github for Atyls board21:17
olofkhesham1: Hard to tell without the full log, but I know that there is some problems with the HDMI output on later ISE versions21:21
olofkIronically it's in code that stekern copied straight away from a Xilinx white paper21:21
olofkCould you check if it's the same issue as https://github.com/olofk/fusesoc/issues/45 ?21:22
hesham1olofk: Ah I came across this issue when I searched for a solution for this error, but it was not of help. stekern suggested to comment out some lines regarding timing constraints, but unfortunately the same problem exists. I will paste a full log to pastebin and give you a link.21:25
olofkThanks21:29
olofkUnfortunately I no longer own an atlys board, so I'm a bit in the dark here, but I'll see what I can do21:29
olofkAs a sidenote, please open issues related to the cores and systems in openrisc/orpsoc-cores instead21:29
hesham1Sure21:31
hesham1Another (side) issue, is that when I comment out morkx and use or1200 cpu instead, I got xst error. But that's not related to the main problem for now.21:32
olofkI really wish there was a nicer way to switch between the CPU implementations, but or1200 is starting to become a second class citizen in our board ports now21:38
olofkBut it's good to know and feel free to open an issue for it so we can fix it21:38
hesham1olofk: The log is too big for pastebin, so I created a google doc for it, please find it https://docs.google.com/document/d/1XKbPo4vVf4xJpCQ_8cXemwDKrv0fC_7svZ8bVZwfhec/edit21:58
olofkMight have another speaker for orconf now22:03
olofkhesham1: C00l. I'll take a look22:03
hesham1Thank!22:03
--- Log closed Fri Aug 29 00:00:28 2014

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