IRC logs for #openrisc Monday, 2014-06-16

--- Log opened Mon Jun 16 00:00:36 2014
stekernolofk: spend cycles, when you do what?04:33
stekernI assume during boot in this case, but those functions are called *a lot* from cpu_idle(), so we want to make sure that we're not optimizing for that ;)04:35
stekernI wonder if gcc's register allocator somehow get thrown off by the calls to mfspr()/mtspr() that later get inlined.04:39
stekernotoh... r2 is only used between the two call sites, so it should be able to use a temp reg there anyway04:41
stekernwhich are number number 1-5 on your list btw?04:45
stekernblueCmd: isn't this misleading?
stekerndoesn't tp actually point at the beginning of TCB?05:43
stekernor... maybe you actually put it *after* the TCB?06:10
stekernI think you do, is there some grand reason for that?06:11
olofkstekern: We will have the fastest cpu_idle() of all the arches :)06:28
olofkSorted by number of cycles06:39
olofkBut as you know, this is just part of the boot, so I assume that it will be quite different for a real workload06:39
olofkFirst column is decimal address btw06:39
stekernlooks like my tlb miss handler optimizations wasn't misplaced ;)06:51
olofkI think there's a udiv64 inside _parse_integer that takes a lot of time. Can we accelerate that somehow?06:56
blueCmdstekern: it makes relocations in easier and not dependent on the PRE/TCB parts08:17
blueCmdwell, on the size of them at least08:17
blueCmdCode to initially initialize the thread pointer. * * Set TP to the address _after_ tcbhead_t. This will allow us * to change the size of tcbhead_t without having to re-link everything.08:20
stekernhmm, ok... but you use the TCB size in the dynamic linker08:22
blueCmdsure, but recompiling the dynamic linker is easy, if the generated assembly / relocations would need to compensate for the tcbhead it would suck08:23
blueCmdit's kind of like TLS variant II, but inverted08:24
stekernyeah, I see08:24
stekernwell, it's variant I, but with tp after TCB08:24
blueCmdin retrospect I could probably have done variant II straight off, but i don't see any downsides with this08:24
stekernmaybe not, other than it was confusing for me when I was reading this and I was trying to figure out which you actually used:
blueCmdstekern: yeah, sorry about that08:28
stekernI'm also confused wether the mips and powerpc 0x7000 offset is calculated from the beginning or the end of their TCB08:32
stekernand, where does other archs put their pthread?08:47
stekernin relation to TCB I mean?08:47
stekernwallento: what's the status on the cache coherency stuff you were working on?12:42
stekernif you have anything remotely working, I'd be interesting in beating it around a bit12:43
wallentohi, still buggy, I hope I will find time this week, but I can push it this evening12:43
stekernthat'd be great, it doesn't matter if it's not completely working, I figured I might be of some help debugging it12:44
wallentoyep, sounds good12:44
wallentoI recently added a PR, maybe you can shortly check it12:44
stekernI've got Linux running reliably on the de0 nano with dual core12:44
stekernthe or1k-src pr you mean?12:45
wallentothis sounds like a proper long run test ;)12:45
stekerngo ahead and push that, it's obviously correct12:45
wallentoon or1k-src/multicore the dynamic reent is screwed, spent the whole morning, but can't figure it out12:46
wallentoif you add assertions it gets link order issues again12:46
stekernok, I haven't used that for anything but to compile your test demo ;)12:47
wallentoMaybe I might ask the newlib guys on the mailing list how god/they intended to use this whole thing..12:47
stekern...iow I'm of little assistance on that issue12:47
wallentomaybe I can ask jeremy, I think he did it before12:48
_franck__if anyone has some time to test openocd JTAG uart support:
stekern_franck__: will do12:59
stekerndo I need to change something in the adv_debug_config?13:00
_franck__thanks, don't forget this JTAG uart has 32 bits access port13:00
_franck__no change in adv_debug_config13:00
stekernit has always been enabled?13:00
stekerndo you use some special driver for it (e.g. in barebox)?13:02
_franck__no, it's a 16550 compatible UART13:03
stekernah, ok13:03
_franck__apply also this when you try it13:05
stekernhmm, do you have a ready branch somewhere I could just pull from?13:06
_franck__try this:
_franck__but that's not the very last version of the patch. I would prefer you get the patch from gerrit13:09
_franck__you can cherry-pick it:13:10
_franck__git fetch refs/changes/62/2162/2 && git cherry-pick FETCH_HEAD13:10
_franck__"download" on the upper right corner13:11
stekernok, will do13:12
olofk_franck_: Looks like your jsp patch killed stekern :(15:11
stekern_franck_: I get this when I try to compile openocd: hla_transport.c:55:3: error: initialization from incompatible pointer type [-Werror]17:22
stekerncompletely unrelated to your changes17:23
stekernoh... I think I screwed up the cherry-picking...17:25
_franck_you need to update jimtcl17:29
_franck_git update submodule ?17:29
_franck_submodule update ?17:29
stekernno, I managed to copy and run the checkout command instead of the cherry-pick17:32
stekernand then it was based on some random old version17:32
stekernnow I have a fail that's perhaps related to your stuff17:33
stekern/home/stefan/openrisc/openocd/openocd/src/target/openrisc/or1k_du_adv.c:209: undefined reference to `jsp_init'17:33
stekerndo I need some config flag to enable the jsp?17:34
_franck_no config flag, just a bug somewhere17:34
stekernbut jsp_init is in src/target/openrisc/jsp_server.c17:35
_franck_strange error because gerrit would have caught it (the online build tool)17:36
_franck_cooking right now, can't help you17:36
stekernok, I'll help myself ;)17:36
stekern...try at least17:36
stekernah... perhaps this is my fault, I probably need to ./bootstrap it17:38
olofkn900 saves the day!!!!17:43
olofkThe touch sensor broke on my android yesterday. Can still see everything, but only top 10% of the touchscreen works. Managed to pair it to my n900 so I could fire up BlueMaemo to use as a HID controller17:51
olofkSo I can now emulate mouse movements on my android phone17:51
olofkIt finally has the role it should have had all along. A puny slave to the great n900 master17:52
stekernI thought you lost/broke your n900?17:52
olofkNah. It works. Only the mobile part that doesn't work17:52
stekernand don't you have a Jolla?17:52
olofkStupid fucking shit phone17:53
olofkReboots every five minutes17:53
olofkNo keyboard17:53
stekernheh... but you can ssh into it17:53
olofkBtw, can I ssh into an android if I root it?17:53
stekernthere's dropbear for android at least17:54
olofkGreat. I won't let this device keep my data hostage like this again17:54
olofkActually, android is pretty nice with a mouse18:02
stekern_franck_: so, how do I connect to it? you telnetted to 9999, but that doesn't work18:36
stekernaha! 777718:39
stekernhmm, but it doesn't seem to work out of the box18:47
_franck_stekern: I forgot to tell you that you need to update your orpsoc-cores repo19:02
stekernok, what's there?19:02
stekernI think something else is broke in my build too though, I don't get the normal uart working with it neither19:04
stekernwhy is it even looking at the byte enable and adr[2:0] if it's 32-bit accesses?19:05
stekernor, is it still byte accessed, but over a 32-bit bus?19:06
_franck_yes it's byte access19:07
stekernok, I thought the stride would be 32-bit too19:07
stekernoh... great... svn: E020014: Can't find a temporary directory: Internal error19:10
stekernif I connect the wb_jsp port, things break19:51
stekern'things break' = I don't get any output on the 'normal' uart19:52
_franck_jtag uart is blocking19:53
stekernyes, but when I try to use the 'normal19:53
_franck_it means your soft will wait until tx buffer is emptied by you connecting to the server19:53
stekern' uart, I'm not trying to access the jtag uart19:54
_franck_ah ok I thought you have both in parallel19:54
_franck_I mean working at the same time19:55
stekernwell, I do, but I configured the jtag uart as uart1, and I'm not trying to access it19:55
_franck_and nothing is written to uart1 ?19:56
stekernif I comment out the wb_jsp ports, it works19:56
stekernno, nothing is written to uart119:56
stekernand I'm sure of that, because commenting out wb_jsp would cause accesses to it to stall19:57
olofkRunning on target or in sim?20:13
stekernseems like removing the irq signal is enough20:14
olofkCould it be level/edge problem?20:14
_franck_may be, I did try it with barebox which doesn't use interrupts20:15
olofkWhat's the funny nop replacer btw? How funny is it? Many questions here20:17
_franck_I could try what's going on in simulation. I'll try to do this tomorrow20:20
_franck_*to see20:20
stekernlet's try if it works without the irq20:22
stekernearly boot uart doesn't use that20:22
stekernhmm... that didn't work21:11
stekerndoes baudrate etc matter?21:11
stekernbah, since I manually added adbg to the caceh, your patch didn't get applied21:14
olofkThe cache stuff desperately needs some love :/21:49
--- Log closed Tue Jun 17 00:00:37 2014

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