--- Log opened Mon Feb 24 00:00:53 2014 | ||
stekern | olofk: when will the rename propagate to openrisc/orpsoc? | 00:43 |
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stekern | and will it be fusesoc-cores? | 00:44 |
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wkoszek_ | It's official: | 03:31 |
wkoszek_ | I can't reset my password for opencores wiki | 03:31 |
wkoszek_ | I'm not getting e-mails from the 'reset password' thing. | 03:31 |
--- Log closed Mon Feb 24 07:58:30 2014 | ||
--- Log opened Mon Feb 24 07:58:44 2014 | ||
-!- Irssi: #openrisc: Total of 33 nicks [0 ops, 0 halfops, 0 voices, 33 normal] | 07:58 | |
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-!- Netsplit *.net <-> *.split quits: rah_ | 08:03 | |
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olofk_ | stekern: I think I'll leave openrisc/orpsoc as it is with a disclaimer that points to fusesoc instead | 08:12 |
olofk_ | And orpsoc-cores might be fusesoc-cores, but I don't feel like it's a priority. The OpenRISC-specific parts are in there after all | 08:12 |
stekern | it's probably better to remove openrisc/orpsoc all together than to leave it as is if you want to continue with it under olofk/fusesoc | 09:23 |
maxpaln | anyone able to give me some clarity on how the Wrap-4/8/16 burst modes work | 09:53 |
maxpaln | I need to predict the next address in the DDR3 wishbone controller | 09:53 |
maxpaln | but it isn't clear to me whether the wrap address just wraps around the same addresses or increments with a wrap element | 09:53 |
maxpaln | I realise that probably doens't make | 09:54 |
maxpaln | sense | 09:54 |
maxpaln | so here is what I don't quite understand | 09:54 |
maxpaln | The wb spec shows some examples for Wrap-4 and Wrap-8 in Table 4-3 | 09:54 |
maxpaln | The second row says this: | 09:55 |
maxpaln | 001 | 1-2-3-4-5-6-7-8 | 1-2-3-0-5-6-7-4 | 1-2-3-4-5-6-7-0 | 09:55 |
maxpaln | so my question is what happens next? For wrap-4 do we get 9-A-B-8-D-E-F-C? | 09:56 |
maxpaln | or do we get the same again: 1-2-3-0-5-6-7-4 | 09:56 |
maxpaln | in other words does it wrap over the same addresses or does it wrap for four beats then increment? | 09:56 |
maxpaln | I think the latter but it isn'r clear to me | 09:56 |
maxpaln | my confusion is compounded by the only example I can find that tries to predict the addresses - Julius' original DDR2 example for the MIG interface | 09:58 |
maxpaln | it appears to just wrap around the same addresses | 09:58 |
stekern | maxpaln: it's probably easiest to show with code: | 09:58 |
stekern | wrap4: {wb_adr_i[31:4], wb_adr_i[3:0] + 4'd4} | 09:59 |
stekern | wrap8: {wb_adr_i[31:5], wb_adr_i[4:0] + 5'd4} | 09:59 |
stekern | wrap16: {wb_adr_i[31:6], wb_adr_i[5:0] + 6'd4} | 09:59 |
maxpaln | so, for wrap4 wb_adr_i[4] never increments | 10:00 |
maxpaln | is that right? | 10:00 |
stekern | the code snippets are from here: https://github.com/skristiansson/wb_sdram_ctrl/blob/master/rtl/verilog/wb_port.v#L135 | 10:00 |
maxpaln | thanks - taking a look now | 10:01 |
stekern | right, for wrap4 wb_adr_i[4] stays the same (as well as 31:5) | 10:01 |
maxpaln | ok, thanks - that code snippet is ideal too :-) | 10:02 |
maxpaln | I think the WB spec could do with a significant update on this subject - the existing description is pretty confusing. | 10:03 |
stekern | I agree | 10:03 |
maxpaln | :-) | 10:03 |
maxpaln | one more thing, those calcs are all for 32-bit mode, everything shifts right two bits for 8-bit mode - I don't need to implement this but it would be good to know if I understand correctly :-) | 10:16 |
olofk_ | It's a miracle that we have two compatible implementations at all, if they have been implemented from the spec | 11:04 |
--- Log closed Mon Feb 24 11:13:32 2014 | ||
--- Log opened Mon Feb 24 11:21:56 2014 | ||
-!- Irssi: #openrisc: Total of 31 nicks [0 ops, 0 halfops, 0 voices, 31 normal] | 11:21 | |
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veprbl | https://www.google-melange.com/gsoc/org/list/public/google/gsoc2014 | 21:07 |
veprbl | looks like opencores is not there | 21:08 |
olofk__ | Well, at least we got some ideas written down for next year's application | 21:51 |
-!- olofk__ is now known as olofk | 21:52 | |
_franck_ | olofk: I patched fusesoc | 21:53 |
--- Log closed Tue Feb 25 00:00:54 2014 |
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