IRC logs for #openrisc Friday, 2014-02-21

--- Log opened Fri Feb 21 00:00:49 2014
wkoszekjuliusb_: What do you do these days?00:11
wkoszekjuliusb_: Still same $JOB ?00:11
-!- Netsplit *.net <-> *.split quits: _franck_, bentley`, heroux, rah_, jeremybennett00:55
-!- heroux_ is now known as heroux00:56
-!- hno` is now known as hno02:32
olofk_maxpaln: $clog2 should be a vlog2001 feature.09:27
maxpalninteresting - it only becomes available in Active-HDL once I turn on the -sv2k5 option. In any case, I got it working now!09:42
maxpalnwell, I got the design compiling - I ran out of time last night to run any simulations. I couldn't spend any time on this last week at all09:43
olofk_maxpaln: Looks like you're right. Hmm.. it was never my intention to depend on sv2k5 features, but at least it seems to be supported in all the simulators I have tried so far11:14
olofk_The sad part of RTL design is that you are considered bleeding edge if you use features from a seven year old standard11:15
-!- stekern_ is now known as stekern12:17
stekernolofk_: I'm about to take the verilator features of the fusesoc formerly known as orpsoc12:17
stekernout for a ride12:17
stekernis there anything I should be aware of?12:18
stekernI don't have verilator nor any systemc installed on this machine (and I rather avoid installing systemc on it)12:18
olofk_stekern: You can't use system-installed verilator yet, so don't run make install and use VERILATOR_ROOT to point out the verilator dir instead12:29
olofk_There's a very basic non-systemc test bench for verilator in or1200-generic. It supports loading elf files with --or1k-elf-load <your_elf_file>, and dumps a VCD (unconditonally? Not really sure)12:31
stekernolofk_: umm... I had hoped to use an 'apt-get install verilator' verilator12:32
stekernthat won't work? (and what's the issue?)12:33
olofk_That won't work. The issue is that I used a non-installed verilator and didn't know about the problem until _franck__ told me. The fix is easy. First try to run verilator directly. If that fails, check if VERILATOR_ROOT is set and then run $VERILATOR_ROOT/bin/verilator, else fail12:36
olofk_quick fix: Remove the check on line 34 in verilator.py. change line 106 to cmd = 'verilator'12:38
olofk_That should do it until it is fixed properly (I think)12:38
_franck_web_AFAIR, it's not that easy12:38
_franck_web_$VERILATOR_ROOT should point to /usr/bla/bla/verilator/bla/include or something12:39
stekernah, well, easy or not.. I'll forge on and fix it, I'm not up for manually installing verilator12:41
_franck_web_that would be great if you fix this12:41
olofk__franck_web_: If it's installed properly, I think that verilator itself sets VERILATOR_ROOT12:42
_franck_web_olofk_: when are you going to rename openrisc/orpsoc to openrisc/fusesoc on github ?12:42
stekernbut first, how am I supposed to start the non-systemc test bench for or1200-generic?12:42
olofk__franck_web_: I have done most of it in my local repo, so I'll push it this weekend12:42
_franck_web_great12:42
olofk_stekern: orpsoc sim --sim=verilator or1200-generic --or1k-elf-load conficker.elf12:43
stekernis the elf-loader or1k specific?12:43
olofk_stekern: Or rather orpsoc sim --force --sim=verilator or1200-generic --or1k-elf-load conficker.elf12:43
olofk_I don12:43
stekernme stekern12:44
olofk_I don't think so now that it's using libelf12:44
olofk_lol12:44
olofk_It was or1k-specific before12:44
stekernok, another thing I'll test (and at least fix the name if it's not)12:44
olofk_Yeah. It's cool if it's cpu-agnostic. I want to test lm32 with fusesoc12:45
stekernI'm on day two on hacking up a pipelined eco32 version, trying to make it in a week ;)12:47
stekerngot most of fetch, decode, alu and mmu done already12:47
olofk_c00l12:49
olofk_How big is the eco32 scene?12:51
stekernsmall12:51
olofk_Anyone else but you?12:51
stekernit's mostly used by a german university12:51
stekernas an education tool12:51
olofk_I did some quick googling just now, and got mostly german links12:52
stekernI've got some changes for cappuccino, that I'm testing in this implementation12:53
olofk_Just noticed the eco32 project on OpenCores. That's very new13:00
stekernyes, Hellwig Geisse, the project founder just created it13:01
olofk_But this page http://homepages.thm.de/~hg53/eco32/ makes it look a lot older13:01
olofk_It's not using any standard bus interface, right?13:02
stekernah, yes, it's been around for many years. I think I heard about it for the first time around 2010 or so13:02
stekernnot the implementation they have, no13:02
stekernmine is wb13:03
olofk_wb makes it a bit more useful13:04
stekernthey have their own reference soc, with serial port, vga console, timer, ide and keyboard cores13:05
stekernError: Failed to checkout http://opencores.org/ocsvn/openrisc/openrisc/trunk/or120013:07
olofk_hmm... that wasn't very helpful13:12
stekernah, pesky dependcy on svn is not fulfilled on this machine ;)13:12
olofk_:)13:12
olofk_That will work out automatically as soon as rel3 of or1200 is done or we switch to mor1kx that has awesome release cycles13:13
olofk_So that we can have release tar balls instead of fetching stuff from repos13:14
stekernthe full error message wasn't much more helpful: http://pastie.org/875545513:14
olofk_oops13:19
olofk_Line 58 in opencores.py should probably be print(e)13:20
olofk_That's the problem with those damn lazy evaluation languages. Some code paths are executed so seldom that bugs can go unnoticed for months13:21
olofk_Oh well. All that will be fixed in fusesoc 1.113:22
stekernThat's going to be completely free from bugs, I reckon13:27
olofk_Yes of course. All the test cases will pass13:29
stekernher's another: http://pastie.org/875552313:35
stekern+e13:35
_franck_web_oh yeah I had that one13:42
stekernhmmm, the problem is that input.vc is in build/or1200-generic/sim-verilator13:42
_franck_web_self.stderr is a file object, so replace with self.stderr.name13:43
stekernok, yeah, that fixes the error msg13:47
stekernhttp://pastie.org/875558113:56
stekernhacks to make it run13:56
stekernthere are errors in wb_intercon though...13:56
stekernbut why do I need to add the full path to the files?13:58
stekernor more to the point, why hasn't it been needed?13:59
stekernolofk_: it doesn't like this master/slave_sel_int business in wb_arbiter and wb_mu14:10
stekernx14:10
stekernwasn't that odd construct in there put there to work-around some issue?14:10
olofk_full path to the files is really awkward. The reason is that I cd to another dir before starting the sim. I did that because the EDA tools are messy and pollute cwd with a lot of files14:14
olofk_For icarus/modelsim I do a little hack so you can specify relative paths and they will be presented as an absolute path to the simulator14:15
olofk_stekern: Which version of verilator are you using?14:15
stekernsome old from 2012, it's what I got when I apt-get it here14:16
stekerntrying with a more recent now14:16
stekernbut why does the cd fail for me then?14:16
olofk_cd fails? Not following you here14:19
stekern"The reason is that I cd to another dir before starting the sim."14:20
stekernor do you mean manually?14:20
olofk_No, orpsoc runs the simulation from build/<system_name>/sim-<sim_name>14:20
olofk_So the paths will be relative to that dir14:21
stekernok, so the million-dollar question is: why doesn't verilator find the files with relative names then?14:21
stekern(here)14:21
olofk_You mean the elf file?14:22
stekernno, the input.vc and tb.cpp files14:22
olofk_aha14:22
stekernthe ones I add the full path to in my 'patch' =)14:22
olofk_Did you clean out the build dir before rebuilding?14:22
stekernrm -rf build, yes14:23
olofk_ok... that's fucking weird14:24
olofk_That works so much better in fusesoc ;)14:24
stekern;)14:24
olofk_hmm...14:24
olofk_ahh..14:24
stekernbuilding verilator on this slomo machine is no fun...14:24
olofk_Maybe it has to do with src_type14:25
stekernI really need to get a new laptop14:25
olofk_I can14:27
olofk_I can't figure out what's going wrong here14:27
olofk_How did you fiure out that tb.cpp and input.vc weren't found?14:28
stekernI've just been waiting for the laptop industry to realise that they should be able to make displays >= 1680x1050 at decent prices14:31
stekernverilator said 'me cannot find'em'14:31
stekernoh... no, my bad14:32
stekernI just realised what happened, I ran the verilator command manually since orpsoc didn't give me the error14:33
stekerndoh...14:33
stekernsorry about wasting your time on that..14:34
stekernand verilator-3.855 doesn't choke on wb_intercon14:43
stekern_franck_web_: have you used the libelf loader with verilator?15:10
_franck_web_I think so15:10
stekernhow? =)15:14
_franck_web_wait :)15:16
_franck_web_unfortunately, it's not on this computer15:17
_franck_web_but I think it needs patches to orpsoc15:17
stekernat least or1200-generic have a local version of the or1k-elf-loader that uses or1k-elf-objdump15:18
stekernhmm, how do I get verilator to link with libelf15:29
_franck_web_https://github.com/fjullien/orpsoc/blob/verilator/orpsoc/simulator/verilator.py15:30
_franck_web_-LDFLAGS15:31
stekernok, yes15:32
stekernhmm, it's still whining about undefined references to various elf_xxxx functions15:35
_franck_web_do you have libelf-devel ?15:41
stekernyes, but it seems like the -LDFLAGS put the -lelf to early on the command line15:42
_franck_web_your errors are not coming from verilator but from gcc right ?15:48
_franck_web_https://github.com/fjullien/orpsoc/blob/verilator/orpsoc/simulator/verilator.py#L4015:48
stekernno, it doesn't come from that15:50
stekernit comes from when the final link is done15:50
stekernhttp://pastie.org/875587215:51
stekernthe 'get_size' is a real missing reference, the others are just because -lelf is to early15:52
stekernok, got around that with the ugliest hack ever seen...16:33
_franck_web_please tell us :)16:39
stekern_franck__: no, I didn't want to give you nightmares23:40
stekernit involved removing the .o's from verilator.py and adding them before the -lelf after the -LDFLAGS in the .core file23:42
stekernwhich probably is the necessary thing to do in the end (adding the .o files to -LDFLAGS and then add userlibs after that)23:43
stekernbut not how I did it now ;)23:43
--- Log closed Sat Feb 22 00:00:50 2014

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