| --- Log opened Sun Dec 15 00:00:09 2013 | ||
| _k | hi everyone! | 09:40 |
|---|---|---|
| _k | I've been trying to get orpsoc (3.1 release or master from git) working, but haven't been able to get a system simulation working yet | 09:43 |
| _k | the generic system doesn't work either | 09:43 |
| _k | for the altera board I got a message complaining about the missing altpll and altsyncram modules missing. so I copied altera_mf.v from my quartus 13.0 installation to orpsoc-cores/systems/de0_nano/backend/rtl/verilog/ and added the verilog file to de0_nano.core | 09:47 |
| stekern | _k: try with or1200-generic | 14:14 |
| _k | thanks stefan, I'm actually interested in using your mor1kx core | 14:55 |
| _k | is it possible to use mor1kx with or1200-generic? | 14:55 |
| _k | and I just realized I don't see a or1200-generic in 'orpsoc list-systems'. How should I use that design? | 14:56 |
| stekern | it's just an example design, but simulation for it should work | 14:58 |
| stekern | but, as you noticed full simulation support for the de0 nano board haven't been completed, I think simulation for de1 should work though (_franck_?). so you could try to bring in the missing pieces for that | 15:01 |
| stekern | from that | 15:01 |
| _k | oh great I try de1 then | 15:01 |
| _k | one more thing | 15:02 |
| _k | well in fact two :) | 15:02 |
| _k | first with the mor1kx_dev_env | 15:02 |
| stekern | iirc, I think you can build that with mor1kx too | 15:02 |
| stekern | the de1board I mean | 15:03 |
| _k | aha ok | 15:03 |
| _k | but for mor1kx_dev_env, it works with verilator | 15:03 |
| stekern | yes | 15:03 |
| _k | but now I'm trying to sim with modelsim | 15:03 |
| _k | using make rtl-test | 15:03 |
| _k | I get a bunch of errors from $hold assertions in sdram module | 15:04 |
| _k | the simulation goes on emitting these errors | 15:04 |
| _k | I've waited for hours for it to finish | 15:04 |
| _k | but it doesnt | 15:05 |
| stekern | what board? | 15:05 |
| _k | it keeps on shouting these errors and there's no output and no conclusion | 15:05 |
| _k | de0_nano again | 15:05 |
| _k | I thought that should be the most stable board as you guys use it in your demos | 15:06 |
| _k | board design I mean | 15:06 |
| _k | the errors are something like this: " # ** Error: /home/kamyar/source/OpenRISC/mor1kx-dev-env/boards/altera/de0_nano/sim/run/../../../../../bench/verilog/mt48lc16m16a2.v(1117): $hold( posedge Clk:158764910 ns, Cas_n:158764910002 ps, 800 ps );" | 15:07 |
| _k | of course this one is from the flash controller model | 15:08 |
| _k | i guess | 15:08 |
| stekern | it is, and iirc, juliusb_ have run modwlsim simulations in mor1kx-devenv for that board | 15:09 |
| stekern | you probably want to decrease the reset wait time when running in simulation though | 15:10 |
| _k | where can I find the option? | 15:11 |
| stekern | it's in the top file | 15:11 |
| _k | ah ok let's try it :) | 15:11 |
| _k | are you referring to the global reset signal (rst_n) in the testbench? | 15:14 |
| stekern | no | 15:15 |
| stekern | it's a parameter to the sdram controller | 15:15 |
| _k | there's a .POWERUP_DELAY param already asigned to 0 for simulation. is that it? | 15:16 |
| stekern | yes | 15:17 |
| _k | so there's nothing I can do with that? what about the flash (mt48lc16m16a2)? | 15:19 |
| stekern | isn't that the sdram model | 15:22 |
| stekern | you can run make rtl-tests PRELOAD_RAM=1 | 15:23 |
| stekern | to avoid simulating the flash (which take forever) | 15:24 |
| _k | oops yes that's the sdram model | 15:24 |
| _k | still getting those $hold errors and no output so far | 15:26 |
| stekern | can't say I remember seeing those ever, but it was a long time since I simulated anything with modelsim | 15:42 |
| stekern | there's a seperate testbench for the sdram controller in orpsocv3 btw | 15:43 |
| _k | oh thanks I try that | 15:46 |
| stekern | it passes that and have been tested on several platforms, so it should be good | 15:48 |
| _k | the generic board in mor1kx_dev_env works fine with modelsim | 15:49 |
| stekern | what test is it trying torun first? | 16:02 |
| stekern | did you try running make distclean before running the de0 nano simulation | 16:03 |
| --- Log closed Mon Dec 16 00:00:11 2013 | ||
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