IRC logs for #openrisc Thursday, 2013-10-17

--- Log opened Thu Oct 17 00:00:43 2013
hansfbaierolofk: I hope now it's in a sane state02:44
hansfbaierstekern: ^02:44
stekernhansfbaier: you shouldn't incrementally apply corrections to something that hasn't been pulled yet03:03
hansfbaierstekern: I thought about it, too. The diff looks nice right now, but the log on openrisc might be cluttered.03:04
hansfbaierstekern: What would you recommend, remove the patch and add another one? I can't see an option to retract parts of a pull request.03:04
stekernand the reasoning for removing the #1 annotations in orpsocv2 is because they are ugly and unnecassary03:05
stekernyou should close the pull request, fix things up and do a new pull request03:06
hansfbaierstekern: Ah I see. Thanks03:06
hansfbaierstekern: Yes they make things harder to read.03:07
stekernI would also use a seperate branch than your master, but that's entirely up to you03:07
hansfbaierstekern: What would the benefits be?03:12
hansfbaierstekern: If I understand linus correctly he said the moment I clone I git repo, I am already on my own branch03:12
hansfbaierstekern: I am looking hard, but can't find how to cancel a pull request.... weird03:13
hansfbaierstekern: I'll try google03:16
hansfbaierstekern: Would  32'hfffffff8 be the right match mask for SPI, with the old location on  32'hb0000000 ?03:18
stekernyes, but you might want to keep your own (public) history seperate from your pull requests03:19
stekern(look in my orpsoc-cores master for example)03:19
stekernif you don't, fine ;)03:20
hansfbaierstekern: Weird, no matter how hard I look, I cant find that button:
stekernhansfbaier: on the bottom of the page, under the comment field03:22
stekernoops I accidently pressed it03:23
hansfbaierstekern: Ahh, ok fine.03:23
hansfbaierstekern: Wondered why it was fone03:23
hansfbaierstekern: What would I want to do now? Remove the file, readd it, then only submit that latter patch?03:24
stekerngit rebase -i03:26
hansfbaierstekern: thanks03:28
hansfbaierstekern: So if I understand correctly your branch for-openrisc contains the pull requests?03:34
hansfbaierstekern: So if I create a branch for-openrisc too, then I could rebase the changes from my master into that branch?03:35
poke53281stekern: I have summarized a little bit my findings in QEMU and send to the mailing list. Let's see what Jia Liu will say.03:59
stekernhansfbaier: correct04:07
stekernpoke53281: excellent!04:08
stekernI'll go read it right away ;904:08
stekernpoke53281: good summary, I think it doesn't sound like your proposed changes will break the spec by far04:19
stekernwhat do you mean with "delayed instructions" in this context though, is that some qemu thing or are you speaking about the branch delay slot?04:20
stekernbut anyways, I agree with the last sentence. qemu is an emulator, not a simulator, so it doesn't have to emulate the hardware perfectly.04:25
poke53281I am talking about the branch delayed slot04:26
poke53281The main violation is point no 1. But this gives also the most benefit.04:27
stekernok, and the impossibility to get exceptions in them "by design", is that "by design" down to how qemu handles things?04:28
poke53281by design is some QEMU thing04:28
stekernbecause tick timer and interrupt exceptions can happen all the time04:28
stekernok, yeah, then I understand04:29
poke53281Look at the 3 points how the tcg works.04:29
poke53281It is never interrupted and there is always only one branch or jump in the end.04:29
stekernah, right04:29
stekernand the delay slot is included in that, makes sense04:30
poke53281only in debug singleshot mode this is important.04:30
stekernyes, but it's ok to just not allow interrupt and tick timer exceptions in the delay slot even then04:31
stekernregarding the flags (1), would it be possible to just calculate them when there's a mfspr from SR?04:32
stekernor the special case with l.addc, that you already mentioned04:34
poke53281Yes, but it must be in the same code fragment.04:34
poke53281And here also the tcg from the i386 fails. If you keep the carry over a jump it is lost.04:34
poke53281add followed by addc is fine04:35
poke53281add followed by branch followed by addc will probably not work.04:35
poke53281I can send you 100MB debug output for openrisc and i386. Then you can see how everything works.04:36
hansfbaierstekern: How do you like this:
stekernyes, I see. So, yeah, that would be the biggest "spec breaker"04:36
poke53281But addc is never used in the toolchain.04:36
stekernpoke53281: haha, no, I'm fine, I prefer to just pick the most important parts from your brain ;)04:36
poke53281So at the moment we are talking about hand written assembler.04:36
hansfbaierstekern: Is it ok to do one pull request for the three commits, or one for each?04:37
hansfbaierlike you did?04:37
poke53281The other one is for example the exception overflow flag. At the moment it is checked dynamically every time. If I check it only one time for the whole block it should be fine. So if you execute the same code twice, one time with flag and one time without flag it will fail.04:39
poke53281Even then it is possible that it will work. I could invalidate all compiled code if the flag is set.04:41
stekernhansfbaier: why are there pure whitespace changes in the same patch as functional changes?04:44
stekernideally, it should be patch 1: whitespace cleanup, patch 2: remove #1 notion, patch 3: reverse reset logic, patch 4: add support for slave select, patch 5: other changes that I haven't spotted in the diff?04:46
stekernto answer your question, it's ok to do a pull request for the whole set of commits04:47
* hansfbaier tired04:52
hansfbaierstekern: I'll carry on tomorrow....04:52
hansfbaierstekern: That means I have to redo everything I did today...04:55
hansfbaierstekern: Has some educational value though...04:55
stekernhansfbaier: sorry for being a picky ass ;)04:57
hansfbaierstekern: You are right, I should be done cleanly, if it is worth being done. I'm just a bit down now, after spending half my day on it, when I should have been feeding my family instead...04:59
hansfbaierBut I'll get over it04:59
hansfbaierHave to learn to do it properly05:00
hansfbaierstekern: Shouldn't we try to upstream some of that? If I read correctly the reset logic on wishbone is sync active high, or am I mistaken?05:01
hansfbaierAlso there are some minor issues, an unused reg, some bitrotten comments05:02
stekernyes, we should05:03
stekernthat's why I think it's also important that we have good seperated commits, that will make it a lot more easier if the upstream author only agree with a subset of the changes05:06
poke53281Yes, I am proud.05:13
stekernhansfbaier: but that's the right spirit, I usually think that way too, if it feels like I wasted time on something, I evaluate what I've learned from it05:19
stekernpoke53281: you should be05:29
hansfbaierstekern: Once again:
hansfbaierstekern: I know the unused register patch contains whitespace as well, need fix?05:40
stekernhansfbaier: that looks great!05:42
hansfbaierstekern: OK, I'll create a push request then05:42
stekernand no, if you fix whitespace damage in the same line as you do the actual functional change, it's fine to just keep it in the same patch05:43
stekernthink about how you read the patches, you look at the changed lines and look for what is changed, if there are a lot of lines with *only* whitespace changes, a lot of time will be wasted trying to figure out what functional change that line has, when there is none05:46
stekernif there is an actual functional change, the time was not wasted05:46
stekernand when the whitespace-only changes are separate you can look at that patch with a different mindset05:48
hansfbaierstekern: Yes, redoing it was quicker than I had anticipated, I just gradually copied over the changes with meld (except WS and #1)05:48
hansfbaierstekern: Also I understood the code better when I realized the added address bit was actually necessary in order to access slave select over WB05:49
hansfbaierstekern: Do I need some kind of adapter in orpsocv3 to tie it in (like I see uart0 has a 32->8 bit adapter...).05:50
hansfbaierstekern: I have already created most of the interconnect and instantiation, but I'm not sure about the different bus sizes.05:50
stekernyes, you have to add the 8bit adapter for it05:51
stekernbasically just copy the uart one and do a search-and-destroy^Wreplace on uart005:52
stekernI guess support for automatically adding that could be added to the wb_intercon_gen, but for now it has to be done manually05:53
hansfbaierstekern: Where is that wb_intercon_gen, in orpsoc?05:54
stekernin orpsoc-cores05:56
stekerndidn't you use that for the interconnect?05:56
stekernand it use this:
hansfbaierstekern: No, manual06:05
hansfbaierstekern: I begin to understand...06:06
hansfbaierstekern: But the top file is still manual as it seems...06:07
hansfbaierstekern: Which irq should I assign to spi0?06:07
olofkstekern: Yes, I want a setup or prepare command too, perhaps even in two levels. One that just fetches the cores, and one that also writes all input files for the build tools and simulators. The last one is good if you want to use what's in build/<system> without using orpsoc06:09
olofkstekern: Haven't had time to turn on my computer yet, so I never got around to commit that. You can do that if you want. You have commit rights, don't you?06:09
hansfbaierstekern: the size parameter, is that in bytes,06:10
olofkstekern, hansfbaier : I don't have any preferences regarding diff styles. I generated mine with quilt, others with git. Just make sure they apply correctly06:11
hansfbaierolofk: Ah, didn't test that, good idea :) But they should06:12
hansfbaierstekern: As it looks with wb_interconn_gen `ifdef SPI0 isn't really an option anymore, is it?06:17
stekernhansfbaier: check in old orpsocv2 where spi0 irq were connected06:18
stekernI think it should be consistent between boards there06:18
hansfbaierstekern: Good idea, thanks06:19
stekernhansfbaier: I haven't considered that, but what's the showstopper for `ifdef SPI0?06:20
hansfbaierstekern: probably none, if the top isn't instantiated, the wb nets should be optimized away by the synthesizer/fitter06:20
hansfbaierlet's see if it compiles06:21
stekernyes, you'll get a few dangling wires, which perhaps isn't all perfect, but it should 'do the job' still06:24
olofkI think that _franck_ kept som `ifdef $CORE in de1. That is totally ok. Just assign values to return data, ack, err and rty06:25
olofkThanks for the pull requests. I'll take a look at them as soon as I can. Can't promise it will be today though :(06:25
hansfbaierolofk: y/w06:31
hansfbaierolofk: Just tested the patches. Apply well.06:42
olofkhansfbaier: Great. Keep the cores coming :)06:43
hansfbaierolofk: Grrr, but got a compile error in it.06:44
olofkI saw your questions about 8/32 bit too. There is a wb_data_resize.v in wb_intercon that you can use to connect 8 bit slaves. It will eventually be instantiated directly by wb_intercon_gen, but for now you have to add it manually06:44
hansfbaierolofk: missing semicolon .....06:45
hansfbaierstekern: Have to redo the patches, don't I...06:46
stekernyeah... it's a bit annoying with the patches in patches, it's double work to do it06:56
hansfbaierolofk: Don't pull yet, have to redo it again...06:56
stekernif it's just a missing semicolon, I would just rebase the orpsoc-cores commits and manually edit the .patch file06:56
hansfbaierstekern: Yes I'll do06:56
stekernthen force push to the branch where the pull request is06:57
olofkI don't want to carry a lot of patches in orpsoc either, but I think it's good to have support for that so patches don't get lost until they are upstreamed07:07
olofkThe other alternative would of course be to pull from a forked repo07:07
hansfbaierCool! Synthesis passes successfully for de0_nano with SPI07:35
hansfbaierNow the fitter is fitting...07:35
hansfbaierstekern: Pushed it with a bit of force....07:46
hansfbaierstekern: the pull request changed automatically, nice07:47
hansfbaierstekern, olofk: the wb_intercon_gen does it do only masks for power-of-two sized sizes? I used size=5 and it generated 0xf...fb which is kind of weird. I had anticipated 0xf...f807:58
stekernit generates the mask by ~(size-1), which is not correct for all input values, see the irc backlog for further info08:00
hansfbaierstekern: OK will fix to next power of two08:03
hansfbaierstekern: but won't generate since is messes up the order of blocks in the file making the diff ugly08:03
stekernjust reorder the slaves in the conf then?08:06
mor1kx[mor1kx] xfguo opened pull request #8: Older versions of icarus doesn't support always @* with empty sensitivity list. (master...master)
hansfbaierolofk: stekern: The pull request got bigger08:33
hansfbaierconsole [ttyS0] enabled, bootconsole disabled08:50
hansfbaierOpenCores Simple SPI controller (c) 2010 South Pole AB08:50
* hansfbaier calls it a day08:51
olofkhansfbaier: Good work! Hope to have time to look at it soon08:53
hansfbaierolofk: I should have worked today actually, but I needed to get this out of my mind to be able to concentrate on my paid work again :)08:54
olofkYou get paid for this work too. I can give you a 30% discount on any core on OpenCores08:55
hansfbaierolofk: :)08:57
hansfbaierolofk: Not shure how I'd test the SPI, maybe connect an Arduino08:57
olofkhansfbaier: You need my fancy SPI BFM that I wrote about in one of my blog posts09:01
_franck_hansfbaier: you can test it by connecting it to the altera EPCS. You have an altera IP allows you to access the EPCS SPI pins09:01
olofkI think _franck_'s idea is better, since my BFM isn't implemented yet :)09:01
olofkOr get a bus pirate from dangerousprototypes.com09:01
hansfbaierolofk: I have a logic analyzer too09:02
hansfbaier_franck_: Ahhh, yes memory09:02
hansfbaier_franck_: good idea. I have a heap of AT24 here (50pcs)09:03
olofkhansfbaier: You're packing more components than the rest of the combined OpenRISC community :)09:04
hansfbaierIt's only 20, sorry09:05
hansfbaierArduino might be a nice idea, though, sketch that prints out SPI data on serial can be ready in 10 minutes09:05
mor1kx[mor1kx] skristiansson closed pull request #8: Older versions of icarus doesn't support always @* with empty sensitivity list. (master...master)
stekernhansfbaier: connecting the EPCS is something we'll want to do eventually anyway09:22
hansfbaierstekern: I see.09:26
stekernor the accelerometer09:29
hansfbaierstekern: good idea09:30
hansfbaierstekern: the first one is already committed09:31
hansfbaierand in the pull request.09:31
stekernaha ;)09:31
hansfbaierstekern: didn't bother to look the pins up. Let me see09:31
hansfbaierstekern: is that the EPCS09:31
hansfbaierstekern: Ah, the second the accel?09:32
rahhansfbaier: on the sockit, would it be possible to access the HPS's DDR3 memory from the FPGA through a bus bridge?09:32
hansfbaierstekern: then the EPCS is already hooked up09:32
hansfbaierrah: Yes, both ways09:32
rahhansfbaier: do you have VGA output working?09:34
hansfbaierrah: Yes, both ways09:34
hansfbaierrah: from HPS and FPGA09:34
rahhansfbaier: what resolution? :-)09:34
hansfbaierrah: as stekern sai 800x60009:35
rahoh :-/09:35
stekernno, it's 640x48009:35
stekernthe pixel clock is currently hardcoded to 25.2 MHz09:36
rahI looked at the DAC datasheet and I saw mention of 1600x120009:36
rahcan the pixel clock be changes?09:36
hansfbaierstekern: set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"09:36
hansfbaierstekern: what are those lines good for? I left them out in the commit09:36
hansfbaierrah: Very likely. Somebody has to do the work though09:37
stekernrah: yes, it can be changed, there are some problems with the bandwidth from the HPS DDR3 into VGA core currently though09:37
stekernso, when the HPS writes to intensively to the HPS DDR3, the screen flickers09:38
hansfbaierstekern: That wouldn't be a problem if accessed through the OpenRISC in the FPGA?09:38
stekernbut the pll connected to the pixel clock is a static one, so changing the pixel clock means resynthesize the system atm09:39
stekernI'm going to change that to a reconfigurable pll09:39
stekernhansfbaier: humm, how do you mean? the VGA core have it's own wb master interface09:40
stekernit's basically because the latency to start a burst is to large, and the VGA cores largest burstwidth is 809:41
rahwell it sounds like it's primitive but usable, and could do with more work to get more functionality from it09:41
stekernso increasing that might completely remedy the problem09:42
rahI'm comparing it to the Cyclone V GX Start Kit which has an ADV7513 HDMI controller whose programming information is only available under NDA, and for which there seems to be no supporting code available in opencores09:42
* rah gets the feeling it would not be a good idea to branch out on his own while having no experience whatsoever of FPGAs09:46
stekernchances are that you don't need that to use it for your purposes09:47
stekernthe information you get under NDA, I mean09:47
rahbut I would still need to put together (1) my own openrisc image including interfaces to the HDMI controller, and (2) my own X driver09:48
hansfbaierstekern: Do you have a dts entry for the EPCS?09:49
stekern(1) yes (2) no09:49
rahstekern: why not X driver?09:50
rahstekern: what X driver would I use?09:50
stekernbut as was discovered by knz, never de0_nano have epcs that are spansion chips, not st09:51
stekernso experiment with the compatible = "st,m25p64"; if that gives you troubles09:51
stekernrah: the fb driver09:52
hansfbaierstekern: Do you have a touch screen display hooked up to the de0_nano?09:52
hansfbaierstekern: Is it similar to this one:
hansfbaierstekern: I have that. Could you hand me the code/stuff to get that working?09:53
hansfbaierstekern: cool09:53
stekernhmm, could be similar. but its 800x40009:54
stekernthe lcd I men09:54
stekerncan't find what ts chip they use in yours09:55
stekernit was mostly a matter of connecting the gpio to an interrupt and enable the driver in linux + the dts stuff09:57
stekerncheck in orpsoc_top09:57
stekernah... sorry, I haven't pushed that...09:57
hansfbaierstekern: Driver is a Himax HX8257-A10:00
stekernok, so it's not the same. ad7843 on my10:00
hansfbaierstekern: needs a driver in the linux kernel. huh?10:05
hansfbaierstekern: The EPCS where is it connected on your dts, spi0?10:05
hansfbaierthat looks like a flash card10:05
rahstekern: ok, but then wouldn't I need to write an FB driver?10:07
stekernrah: you can use the one that I wrote10:09
rahstekern: ah :-)10:42
rahstekern: you have an FB driver that will drive an ADV7513 HDMI controller?10:43
hansfbaierolofk, stekern: Now SPI1 (the AD converter) is connected, too10:45
stekernrah: an fb driver for the vga/lcd core, yes10:58
hansfbaierHAHAHA that's the sign I'm tired. I added the SPI1 connection to the AD converter too. But the serial just would be blank on barebox and linux, whereas memory tests and blinkys (barebone) worked. So I double checked the patches, and promptly discovered that I assigned the same memory to spi0 and spi1 (copy and paste error). After correcting the same errors persisted. I was dumbfounded, what was it?11:44
hansfbaierAs it turned out the serial2usb of the de0-nano was disconnected (switched off) and an empty ft245 was on instead......11:45
hansfbaierI discovered the good news after I saw the linux heartbeat LEDs blinking.....11:45
rahwell, then I'd still need to integrate the HDMI DRM output into the FB driver11:46
rahregardless, (1) was enough to put me off :-)11:46
* hansfbaier is longing for the moment, when I can send my first email that ends with: -- Sent from my FPGA11:47
juliusbthat'd be very cool11:49
rahhas anybody managed to achieve that?11:49
* rah wants this as well11:49
amshansfbaier: port the CADR to an fpga, en run System 99 on it, connect via CHAOSnet and send email using bangs ??? win ? :-)11:51
hansfbaierams: what is CADR?11:52
hansfbaieryou confuse me...11:52
amshansfbaier: it is a revised version of the CONS11:53
hansfbaierams: LISP....11:53
hansfbaierams: why not haskell?11:53
hansfbaierway geekier than LISP11:53
amshansfbaier: i disagree.11:54
hansfbaierams: Does LISP have Monads?11:54
amshansfbaier: sure11:54
hansfbaierams: But LISP is not side effect free :-P11:55
amshansfbaier: the question has RANDOM-LANGUAGE-TURING-COMPLETE-LANGUAGE feature FOO is quite pointless.11:55
hansfbaierams: Not purely functional that is11:55
amshansfbaier: it can be, quite easily.11:55
amsyou are also implying, indirectly, that side effect free languages are somehow better in all cases.11:56
rahhansfbaier: I'm thinking about getting a sockit now, and if you have a sockit but can't send emails, I'm wondering: what is preventing you from doing so?11:56
rahwhat are the blocks?11:56
hansfbaierrah: well priorities :)11:57
hansfbaierrah: I want to write a network driver that connects the HPS and the FPGA Linux11:58
hansfbaierrah: copies packets over via memory11:58
hansfbaierrah: but before that I want to do that as a char device.11:58
hansfbaierrah: But today I decided to play with the de0_nano instead.11:58
hansfbaierrah: Still a lot to learn11:58
rahhansfbaier: ah yes, you mentioned that11:59
hansfbaierrah: If I have the netdev, just need to compile an email client like mailx and send the mail11:59
rahhansfbaier: have you bridged the ethernet PHY on the HPS?  (or tried to?)11:59
stekernrah: hdmi drm? the chip you are speaking about have a "vga" interface by the looks11:59
hansfbaierrah: not tried, not interested ATM11:59
amsactually, i will pay anyone 1000 EUR if they get a symbolics 3600 on an fpga.12:00
hansfbaierrah: want to learn about driver development. IIRC stefan has used two new IP cores to connect the two systems using existing Linux drivers.12:00
rahstekern: there's a "DRM encoder slave" kernel driver from the manufacturer which will allow you to control the HDMI output12:02
rah(and audio)12:03
rahhansfbaier: I see12:03
amshansfbaier: honestly i'm not to interested in `new' isa designs for lispm :-)12:07
amsmostly since they tend to revolve around `oh look ... we can do lispy stuff on a instruction level ... now we are done' ...12:08
* hansfbaier is done for today12:08
amswhich is totally uninteresting, it has been done since the 1970's with a cpu doing gc on the chip.12:08
hansfbaiersee you around12:09
stekernrah: why on earth do you want to DRM encode yourfb output???12:18
_franck_HDCP decoding would be more useful12:19
_franck_one more thing I always wanted to do...12:20
rahstekern: erm.. DRM -> Direct Rendering Manager, not DRM -> Digital Rights Management :-)12:20
stekernrah: heh, ok. either way, your explanation of what you need to do was incorrect. the chip has 3 interfaces, vga <- vga/lcd core (with no changes needed), i2c control interface <- i2c core (with no changes needed) and i2s audio <- I wrote a I2S core the day before yesterday13:08
rahstekern: how do you know no changes are needed over i2c?13:14
rahstekern: I presumed the chip would need to be configured first13:14
stekernI presume that's what the driver you linked to does (but I didn't check closer)13:15
rahit does use i2c, which according to the block diagram is connected to "registers and configuration logic"13:16
rahhang on now I'm confused13:32
rahyou said "i2c control interface <- i2c core (with no changes needed)"13:32
rahstekern: did you mean no changes were needed to existing code, or no configuration changes were needed to the hardware to make it work?13:33
stekernI meant no changes at hardware level13:38
rahI see13:47
stekernbut I agree with your main point, the cyclone v gts board is unchartered water, you'd be the first one with that board and on your own (at least until someone else comes along with that board)14:13
stekernif someone sposnored me with that board I'd be happy to do the work ;)14:14
olofkTime for weekend!14:20
stekernwell, not completely on your own of course, we'd be here cheering and patting you on the back, and being picky asses about your patches ;)14:21
gautschihi everyone14:28
gautschijulius: i have a few questions regarding the gcc regression tests14:29
gautschiI'm the one who was doing the modification on the or1200 which were presented by davide last week14:29
rahstekern: hah! :-)14:33
olofCrap! Turns out it's only thursday today :(16:51
poke53281I got competition:
--- Log closed Fri Oct 18 00:00:44 2013

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