IRC logs for #openrisc Tuesday, 2013-10-01

--- Log opened Tue Oct 01 00:00:20 2013
stekernjuliusb: umm, check it in where?02:29
stekerngdb doesn't compile much after or1k-src sync...02:46
stekernnow it does03:19
stekernI don't think I'll do the rebase after all03:19
stekernor, I've already done it, but I don't think I'll push that. I'll push a merged tree instead.03:20
stekernpoke53282: I just successfully tested compiling a simple hello world with a native 4.9.0 gcc now03:29
stekernso you should be able to switch over to that03:29
hansfbaierstekern: Is there a test suite to make sure the self hosted gcc does alright?03:44
stekernyes, but we haven't succeeded to build a selfhosted gcc yet03:44
stekernwe can build a native gcc using the cross compiler though03:45
hansfbaierstekern: ah04:38
hansfbaieris there a test suite of some kind for that04:38
stekernyes, the same test suite05:23
stekerni.e. the gcc regression tests05:24
stekernbut we haven't run that against the native gcc yet neither, running the tests takes about a day when they are compiled on a seperate machine and transferred and executed on the target05:25
_franck_juliusb: I never did that test (reset the board while openocd is connected)05:33
_franck_juliusb: it need to be fixed05:34
stekernpoke53282: I also put your vararg patch in a special branch:
juliusbstekern: I mean can I commit these changes to the de0 nano core? how should we handle slight modifcations/variatns out of the box like this?08:31
juliusb_franck_: ok cool, something for a TODO list :)08:31
stekernjuliusb: in general, I think it's best to just have a default and let people that don't like it adjust it in their local tree08:46
juliusbok, but for the workshop, how do you think we should handle this? have a patch or something?08:49
stekernyeah, not sure08:50
stekerncleanest would be to just insert another uart there08:52
juliusbmm, not a bad idea!08:52
stekernanother option is to do what you did on the ml501 board connect the rx/tx to both places08:53
stekernbut there was some problem with that08:54
stekernwhen the second uart wasn't connected08:54
juliusbhmm yeah that's kinda messy08:54
stekernI think that should be ok if you use internal pullups on the rx lines though08:56
stekernbut I think I'm happy with either, as long as you don't put it like in this picture:
stekernI have the LCD add-on connected to that08:58
juliusbno it's on the other side09:00
stekernthat was the reason I choose the connector under the board for jtag and uart, all add-ons (well many are discontinued now) use the side connectors09:00
stekernthe uart or am I mixing up where I have my LCD?09:01
juliusbthat's where I'm connecting mine09:01
stekernok, yeah, other side. so the other one is a staged foto ;)09:02
stekernI really should have went to bed 3 hours earlier than I did yesterday...09:08
PowermaniacSo how is everyone OpenRISC projects going?10:01
olofkjuliusb, stekern: Generally speaking, systems are meant to be cheap. So if we want something out of the ordinary for the workshop, we could just create a new system based on de0_nano in a separate archive and  use --cores-root to find it10:11
olofkPowermaniac: I think it's business as usual. Some new stuff working. Other stuff is breaking apart :)10:13
Powermaniacolofk: Ahh okay, I can't believe I can put Debian on ORPSoCv3 but can't put it on my Nexus 7...=\10:14
Powermaniacolofk: Well not as a full install exactly...10:14
olofkI'm really stressed out about the orpsocv3 presentation at orconf right now. Can we delay the conference for a few months perhaps? :)10:14
olofkPowermaniac: I don't think anyone has done a debian build for or1k. Seems like a huge amount of work to get that running10:15
Powermaniacolofk: Oh...Hmm10:15
* hansfbaier compiles the sockit with orpsocv310:20
hansfbaierstekern / olofk: Is the current orpsoc able to accomodate 10 or1k cores?10:22
stekernI don't think it's orpsoc that is teh limiting factor there10:22
hansfbaierstekern: would be nice for the gcc regression suite, for parallel build10:24
hansfbaierstekern: But the sockit probably can do something close to 10 cores. I run one on an EP4CE1010:24
hansfbaierstekern: What would be the limiting factor, block ram?10:25
Powermaniachansfbaier: 10 or1k cores holy O_O10:27
Powermaniachansfbaier: Trying to make a clone of the Parallella epiphany core but with or1k?10:27
stekernyes, I was thinking about fpga resources10:28
hansfbaierPowermaniac: No, just think that would be nice for running the gcc regression tests10:28
hansfbaierstekern: maybe interconnect10:29
PowermaniacOh okay10:29
hansfbaierPowermaniac: if that takes a whole day so 10 cores would cut that time down, hopefully10:30
hansfbaierPowermaniac: and it would be cool10:30
stekernbut you can run the gcc test suite against or1ksim10:30
hansfbaierstekern: Ah yes. Is that faster?10:31
stekernand when jeremybennett used to do that a lot, he'd run several instances of or1ksim to get it parallel10:31
hansfbaierstekern: When building sockit orpsocv3 I get this: Error (12006): Node instance "hps" instantiates undefined entity "sockit" File: /home/jack/HDL/src/openrisc/orpsocv3/orpsoc-cores/build/sockit/src/sockit/rtl/verilog/orpsoc_top.v Line: 57010:32
stekernno it's probably about the same, but the reference "1 day" was with or1ksim10:32
stekernhansfbaier: yes, you need to generate the qsys generated system10:33
hansfbaierstekern: is that in the docs?10:33
hansfbaierthere are no docs as it seems :)10:34
stekernyou can either do that by opening the .qsys file with the qsys gui and set the output directory to  build/sockit/src/qsys/10:34
stekernor run it from commandline like this:
olofk..or stekern could check in the generated files ;)10:36
stekernhave you seen the files it generates?10:36
hansfbaierstekern: many thanks10:38
stekernbesides, are there no issues distributing the generated files?10:38
stekernlicense/legal wise I mean10:39
stekernwith that logic we should check in the quartus project files, db, the resulting .sof as well ;)10:40
olofkstekern: Yes, I know. Just wanted to annoy you. Sorry :)10:45
olofkI'm as allergic to crappy generated files as you are. I have to force myself every time to accept the pull requests with generated PLL wrappers10:46
stekernI've avoided them in sockit!10:46
stekernbut they are much nicer for cyclone iv10:47
hansfbaierstekern: can you point me to a good intro for qsys? Purposefully avoiding google here....10:47
stekernhansfbaier: humm, for just generating, you open the last page in the qsys gui and press generate.10:48
stekernas for editing... you click around until you learn how it works... or that's how I did it at least10:49
stekernbut the only thing the qsys generated system does is to instantiate the arm processor and ddr3 memory controller10:53
stekerneverything else is done in orpsoc10:54
stekernhansfbaier: (no docs) there is a README11:02
stekernI intend to write something more into that before submitting to orpsoc-cores11:03
hansfbaierstekern: It almost worked....12:03
stekernwas that with my commandline option?12:08
stekernhansfbaier: aha!
stekerngoogle win again12:12
stekernbut the root cause seems to be the good old "ubuntu uses dash", are you still using that?12:15
stekern"still", I don't know your prior shell uses ;)12:16
stekernbut I swapped that out for bash so long ago that I have forgot about it12:16
juliusbolofk: ah it'll be cool man! Don't stress about it. the workshop will go well, there's certainly no showstoppers12:22
juliusband what has been achieved so far is very, very impressive12:22
juliusbI hadn't been keeping much of an eye on it the last 6 months but then all of a sudden it's this incredible system with a bunch of great features and combined with things like the wb intercon generation etc. it's a seriously useful bit of kit12:24
juliusbit'll surely be honed a bit more over the coming 12 months or so, but I think it's good for what we want to do this weekend12:24
stekernI'm completely of the same opinion12:25
stekernas a soc building tool, it's way beyond what orpsocv2 ever was already now. There are features in orpsocv2 that is missing in orpsocv3, sure, but they'll come in time.12:28
stekernI'm more worried about our mor1kx presentation, at least my part, I haven't even started planning the presentation...12:29
hansfbaierstekern: thanks a lot. Sorry I was so lazy but had to go away from the computer. Family duties12:30
hansfbaierstekern: And gotta practise my horn. Tomorrow night big time Jam Session in jakarta12:30
hansfbaierstekern: weird, qsys ran through nicely now12:52
hansfbaierbut still the same error12:52
hansfbaierError (12006): Node instance "hps" instantiates undefined entity "sockit" File: /home/jack/HDL/src/openrisc/orpsocv3/orpsoc-cores/build/sockit/src/sockit/rtl/verilog/orpsoc_top.v Line: 57012:53
hansfbaierlet's look12:53
hansfbaierstekern: maybe another day. difficult thing to do with 2yr old on la\\p12:55
stekernhansfbaier: hehe, sounds familiar ;)13:19
stekernbit did you put the files in your-build-dir/build/sockit/src/qsys13:20
hansfbaierstekern: maybe not will look13:53
hansfbaierthanks a lot13:53
_franck_olofk: how do you choose between modelsim and icarus when both are in you core file ?14:02
juliusbstekern: (mor1kx presentation) I was mainly going to leave it to you.... I was just going to present my wishes for what it should be in future (my ROM/TCM port) etc.14:51
juliusbbut I'm sure if you just list what you've done so far, it's going to be an impressive enough session14:52
stekernI just have to start doing the list then... ;)14:59
juliusblucky for us git has commit history15:05
stekernhaha, yes, just copy&paste a git log into a pdf and "this is what we have done, questions?"15:19
poke53282Thanks stekern. One question. Did you compile X with or without the vararg patch. I am curious if there is a problem as well.16:28
poke53282I think I should start slowly the eglibc project. blueCmd has done such a nice job in porting it.16:41
stekernpoke53282: which vararg patch are you referring to now? the one we had in or1k-native, the one that got applied to upstrean (now in our or1k branch) or your vararg patch?16:47
stekernI currently compiled the whole 'demo' with or1k branch16:48
poke53282Ok, so no patch applied.16:48
-!- Netsplit *.net <-> *.split quits: Amadiro, trevorman, knz, LoneTech, hno19:27
-!- trevorman is now known as Guest6538320:06
juliusbstekern: how much testing has this DE0 nano image had?20:30
juliusbI'm having trouble getting a basic timer interrupt bit of software going20:30
juliusbit's just locking up20:30
juliusbwell, it's running, I can printf() stuff out, and I can see the TTCR counting up and wrapping but the timer interrupts aren't firing ?!20:59
juliusbmmm... somehow I can't write the TEE bit in the SR?21:07
juliusband even SR_SM isn't set but it should be21:08
juliusbalright somehow, because I haven't been resetting it, SM got set to 0, and of course you can't write to SR if SR[SM] is 0!21:11
juliusba hardware reset via the debug interface would be good!21:12
juliusbalright, oldest trick in the book is making this work - disable the instruction cache....21:18
juliusband I have the timer working OK21:19
juliusbwith the baremetal newlib stuff21:19
_franck_juliusb: you can to a target reset with openocd21:22
_franck_via the telnet console21:23
juliusboh, cool21:23
juliusbmmm, that didn't do a full reset21:23
juliusbit just unstalls the processor as far as I can see?!21:24
_franck_need to look at the de0 top to see if the cpu reset is ORed with the reset from the debug interface21:25
juliusbok cool21:26
_franck_that should do it21:27
_franck_assign or1k_rst= wb_rst | or1k_dbg_rst;21:27
_franck_mor1kx: .rst(wb_rst),21:28
_franck_should be .rst(or1k_rst)21:29
juliusbalright, nice. Would be good to reset the entire system, though21:30
juliusb(except the TAP and debug IF obviously)21:31
juliusbcool, yep the reset command works well now :)22:32
poke53282blueCmd: Compiling the whole toolchain with eglibc works without problems. But then I compile busybox statically and exchange the provided one in /arch/openrisc/support/initramfs/bin/busybox23:14
poke53282I end up in a kernel oops. This does not happen if use the provided busybox binary.23:15
poke53282The problem is a null pointer dereference at virtual address 0x0 in the function sys_or1k_atomic23:17
poke53282I use the normal or1ksim and no other patches23:17
poke53282If you don't know the answer no problem, I will find myself.23:17
poke53282Crazy: This problem happens in process modprobe (pid: 17)23:27
poke53282Ok, probably this is wrong. The call graph looks like this: ptmalloc_init.part.9 -> __linkin_atfork -> Syscall 224 -> or1k_atomic -> Kernel oops23:52
--- Log closed Wed Oct 02 00:00:21 2013

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