| --- Log opened Sun Sep 08 00:00:46 2013 | ||
| _franck_ | stekern: http://pastebin.com/jTPpGrgA , is my cache config valid ? | 08:09 |
|---|---|---|
| stekern | _franck_: a 256 byte cache, should be valid, but I don't think I've ever tested that small | 12:15 |
| stekern | let me try in verilator right now | 12:16 |
| stekern | 4k 1-way cache is the smallest I had | 12:18 |
| stekern | (again, we should have a buildbot running our tests against a large set of possible configurations) | 12:18 |
| stekern | _franck_: looks like you've found a bug, it's not because it's too small, but seems like 1-way has suffered a regression | 12:23 |
| stekern | I'll take a closer look in the evening, a bit busy with kitchen renovation right now ;) | 12:24 |
| _franck_ | stekern: another thing, have you ever tried to simulate your mor1kx with modelsim ? | 13:21 |
| stekern | "my" mor1kx == cappuccino? | 13:24 |
| stekern | but yes, I have, it was a while ago now though | 13:24 |
| stekern | why, are you seeing problems? | 13:25 |
| _franck_ | when I run a simulation with modelsim, wb_ibus_adr stays XXX, I need to see what's going on | 13:26 |
| _franck_ | or1200 and mor1k works with icarus | 13:26 |
| _franck_ | or1200 works with modelsim | 13:26 |
| _franck_ | I need to find why mor1k doesn't work with modelsim | 13:26 |
| stekern | did you get the icache error in modelsim? | 13:40 |
| _franck_ | imem_err was not initialized, I'll have my name in mor1kx :) | 13:43 |
| _franck_ | http://pastebin.com/5XDwrCZr | 13:44 |
| stekern | hmm, isn't the problem with the ibus_err_i signal if you need that? | 13:47 |
| _franck_ | well you might be right, I always go too fast | 13:50 |
| stekern | anyways, the problem with the 1-way icache is harder to solve... it's because code is optioned out without generate statements | 13:50 |
| stekern | this makes icarus happy at least: http://pastie.org/8308240 | 13:52 |
| stekern | verilator is harder to please | 13:52 |
| stekern | I just figured out the only sane way to get a uart on the sockit | 14:39 |
| stekern | hook it up internally to the second uart of the arm and open up a terminal in on the arm machine | 14:40 |
| stekern | "figured out" == came to the conclusion | 14:41 |
| stekern | so I guess I have to jump to the next step right away, drop in the hps into the project and wrap orpsoc inside a qsys project | 14:59 |
| stekern | maybe I could test a small ledblinker first though | 14:59 |
| stekern | hmm, wonder if they did some virtual_jtag changes in cyclone v | 17:38 |
| stekern | _franck_: can you make something out of this, or do I need to dig myself? http://pastie.org/8308795 | 17:39 |
| _franck_ | you need to change the fpga tap id | 17:40 |
| _franck_ | in the tcl file | 17:40 |
| stekern | yeah, that's what I'm guessing | 17:40 |
| stekern | which one? | 17:40 |
| _franck_ | there is so much config out there.... | 17:41 |
| _franck_ | do you have an altera_....tcl ? | 17:41 |
| stekern | yes, I have an old setup that I got after following your advice | 17:41 |
| stekern | my openocd might be very old too :/ | 17:41 |
| _franck_ | or in ./tcl/target/or1k_vjtag.tcl | 17:42 |
| stekern | but it has worked fine for my needs until now | 17:42 |
| stekern | I don't have that .tcl | 17:42 |
| _franck_ | grep for FPGA :) | 17:44 |
| stekern | ./tcl/target/vjtag.cfg | 17:44 |
| stekern | that I have ;) | 17:44 |
| _franck_ | the one I am working on have different tcl setup | 17:44 |
| _franck_ | looks good ;) | 17:44 |
| stekern | so I should have 'set _FPGATAPID 0x4ba00477' there, right? | 17:45 |
| _franck_ | yes | 17:45 |
| stekern | where does that mfg and part come from? | 17:45 |
| _franck_ | I hope some day our openocd port will be upstream and we'll erase all those openocd copies :) | 17:46 |
| stekern | hmm, not sure that's right | 17:46 |
| stekern | http://pastie.org/8308816 | 17:47 |
| stekern | get that now | 17:47 |
| _franck_ | don't we have two devices chained on the jtag (arm + fpga) ? | 17:48 |
| stekern | yeah, that's the arm | 17:48 |
| stekern | should be 02D020DD | 17:48 |
| _franck_ | http://openocd.zylin.com/#/c/1494/ | 17:49 |
| _franck_ | I don't know if you need to declare two taps | 17:49 |
| _franck_ | lets try with your config and 02D020DD | 17:50 |
| _franck_ | then you're on your own since I never tried that.... | 17:50 |
| stekern | nah, that's not working... | 17:51 |
| stekern | it only find the arm, since that's the first | 17:51 |
| stekern | I mean, 02D020DD doesn't work | 17:51 |
| _franck_ | so you need to declare two taps | 17:52 |
| stekern | yup... | 17:53 |
| stekern | hmm, in that config in the patch, he just do two jtag newtap | 17:55 |
| stekern | ok, that made progress | 17:58 |
| stekern | (first running the jtag newtap on the arm first) | 17:58 |
| stekern | http://pastie.org/8308838 | 17:59 |
| _franck_ | this might be serious... | 18:01 |
| stekern | maybe I should update my openocd first though...? | 18:01 |
| stekern | this is probably more than a year old | 18:01 |
| _franck_ | my be everythings goes wrong because of this new tap to be bypassed | 18:01 |
| _franck_ | yeah my be | 18:02 |
| _franck_ | you can git clone the offical openocd repo | 18:02 |
| _franck_ | the go to gerrit openocd and cherry pick openrisc port | 18:03 |
| stekern | hmm, can't I just clone the one in github? | 18:07 |
| _franck_ | you can but I don't think there is a lot of differnces | 18:08 |
| stekern | well, "go to gerrit openocd and cherry pick openrisc port" seems like more trouble ;) | 18:09 |
| olofk | _franck_: Nice. I see that JTAG VPI is merged now | 18:15 |
| stekern | bah, autotools are acting up.. | 18:15 |
| olofk | stekern: I remember having some trouble with openocd and autotools about a year ago | 18:16 |
| stekern | http://pastie.org/8308865 | 18:17 |
| olofk | stekern: Can't remember if that was the problem, but I see that all references to nobase_dist_pkglib_DATA has been changed to nobase_dist_pkgdata_DATA in my local copy | 18:19 |
| olofk | Probably not the same problem | 18:21 |
| _franck_ | stekern: I'll try to debug this tonight with jtag_vpi and two jtag tap | 18:38 |
| stekern | _franck_: can you give me a bootstrapped tree...? | 18:52 |
| knz | stekern: renove aclocal.m4, then run autoreconf -v -f -i | 18:55 |
| knz | is it reasonably doable to connect verilog components to vhdl componetns? | 18:57 |
| stekern | knz: (autoreconf) yeah, no that doesn't work... | 18:58 |
| stekern | (connect verilog to vhdl) depends on the tools | 18:58 |
| stekern | you'll be screwed trying to simulate it with opensource tools | 18:59 |
| knz | ok | 18:59 |
| knz | I'm thinking mostly fpga | 18:59 |
| stekern | the synthesis tools handles it fine | 18:59 |
| knz | stekern: libtoolize -v -f -i && autoreconf | 19:03 |
| _franck_ | stekern: https://www.dropbox.com/s/jcabj8po65u2ftf/openocd.tar.bz2 | 19:04 |
| _franck_ | ./src/openocd -f ./tcl/interface/altera-usb-blaster.cfg -f ./tcl/board/or1k_generic.cfg | 19:05 |
| stekern | knz: nope | 19:09 |
| stekern | _franck_: thanks, now it's building | 19:09 |
| stekern | I think my autotools setup is borked | 19:10 |
| stekern | _franck_: yeah, same result there | 19:19 |
| _franck_ | well we have a problem... | 19:21 |
| stekern | I pushed my sockit WIP to https://github.com/skristiansson/orpsoc-cores | 19:27 |
| stekern | if you want to test against that I mean | 19:27 |
| stekern | it's not very clean, but it builds ;) | 19:28 |
| _franck_ | ok, tommorow, I'll get the sockit and try to figure things out | 19:28 |
| stekern | maybe I should make the ROM just do an endless loop and not jump to a RAM that doesn't exist | 19:33 |
| stekern | it's also not completely impossible that I've screwed up something in the soc... | 19:48 |
| _franck_ | I have simulated a so with 2 taps and it works... | 19:49 |
| stekern | _franck_: http://pastie.org/8309028 | 19:53 |
| _franck_ | great ! | 19:54 |
| _franck_ | what was the problem ? | 19:54 |
| stekern | obviously it didn't like jumping to a RAM that doesn't exist... and then tries to jump to an exception vector in a RAM that doesn't exist | 19:54 |
| stekern | I forgot that I hadn't put a RAM in there yet.. | 19:55 |
| _franck_ | nice to hear :) | 19:55 |
| stekern | time to put a RAM in there so I can blink some LEDs ;) | 19:56 |
| _franck_ | about this: http://pastie.org/8309041 | 20:03 |
| _franck_ | we have ibus_err_i = 'X' because ibus_adr_o is all X (and the wb_mux doesn't know which err select from downstrem ports) | 20:03 |
| _franck_ | ibus_adr_o is all X because imem_err is X... | 20:03 |
| stekern | ah, ok so your fix is correct | 20:04 |
| _franck_ | so my solution is pretty simple after all | 20:04 |
| stekern | well, it wasn't wrong before neither, but it is _the_ correct fix | 20:04 |
| _franck_ | I'll prepare a patch | 20:05 |
| stekern | at least manually blinking the LEDs via gdb works | 20:12 |
| mor1kx | [mor1kx] fjullien opened pull request #4: cappuccino/fetch: initialize imem_err during reset (master...master) https://github.com/openrisc/mor1kx/pull/4 | 20:23 |
| --- Log closed Sun Sep 08 22:02:54 2013 | ||
| --- Log opened Sun Sep 08 22:03:12 2013 | ||
| -!- Irssi: #openrisc: Total of 31 nicks [0 ops, 0 halfops, 0 voices, 31 normal] | 22:03 | |
| !asimov.freenode.net [freenode-info] channel trolls and no channel staff around to help? please check with freenode support: http://freenode.net/faq.shtml#gettinghelp | 22:03 | |
| -!- Irssi: Join to #openrisc was synced in 24 secs | 22:03 | |
| -!- Netsplit *.net <-> *.split quits: jonmasters, simoncook, Amadiro, larks, mick_laptop, stekern, forkG, ams, jakob___, ysionneau, (+18 more, use /NETSPLIT to show all of them) | 22:07 | |
| -!- Netsplit over, joins: heroux, _franck_, LoneTech, simoncook, larks, bentley`, stekern, trevorman, forkG, enghong (+12 more) | 22:19 | |
| -!- Netsplit over, joins: O01eg, jakob___, jonmasters | 22:19 | |
| --- Log closed Mon Sep 09 00:00:48 2013 | ||
Generated by irclog2html.py 2.15.2 by Marius Gedminas - find it at mg.pov.lt!