| --- Log opened Fri Aug 23 00:00:23 2013 | ||
| stekern | olofk: you can't go solving your problems yourself, then you make us others feel redundant! | 03:15 |
|---|---|---|
| stekern | at least this store buffer business pay off in the fmax department, it went from 65MHz => 75MHz with a full blown cappuccino on a full blown orpsoc on de0-nano | 03:28 |
| stekern | and coremark actually shows a performance increase (84 => 86) | 03:28 |
| stekern | it was the dhrystone test that showed a decrease (1.26 => 1.24) | 03:29 |
| stekern | and the worst-case path actually looks bogus, and I think that will disappear when I move the refill bus accesses to the lsu | 03:32 |
| stekern | I want to have all of the bus accesses in one place, because now there's a lot of duplicated logic and unneccesary muxing out on the dbus signals | 03:33 |
| stekern | (on the ibus signals for that matter too, but that's for later) | 03:33 |
| stekern | speeding up the emptying of the store buffer onto the dbus helped a lot, it cranked up the dhrystone result to 1.44 | 06:33 |
| _franck_ | stekern: very good ! | 07:27 |
| stekern | coremark result got a bit better too, 88 now | 07:50 |
| stekern | this is all in the verilated model with the "random bus ack" logic though | 07:51 |
| stekern | haven't ran it in real hw yet | 07:51 |
| stekern | so ~5% increase for coremark and ~16% increase for dhrystone, I'm pretty pleased with that | 07:55 |
| olofk | stekern: Way to go! | 09:34 |
| stekern | and it's still buggy as hell ;) | 09:36 |
| stekern | I think I need to write a bit of tests to stress it | 09:38 |
| olofk | stekern: Good thing that you released a tagged verison before pusing the store buffer then ;) | 09:38 |
| stekern | there's still time to do that! | 09:39 |
| stekern | nothing have yet been released from the dark dungeons of my magnetic disk drives | 09:40 |
| olofk | Hmm.. that's true. Git makes it easy to retro-fit a label to any commit | 09:40 |
| stekern | mmm, and I have all this in a seperate local branch even | 09:41 |
| olofk | Ah yes. That's how things should be done. Figuring out how to use git branches correctly is still a bit of a mystery to me | 09:42 |
| olofk | My branches usually consist of cp -a repo new_repo | 09:43 |
| stekern | heh | 09:44 |
| stekern | I actually do that too, but that's when I want to manually merge something from two branches | 09:45 |
| stekern | you could achieve that by not copying, but I for some reason prefer to have a physical copy of both when I do that | 09:46 |
| stekern | because in my messy way of doing things, when working on a new feature, I usually start in a new branch, make a big mess with comented out code and lots of commits. | 09:51 |
| stekern | then when I have something that is working, I do the copy of the repo and look at the diff between my mess and the original, and from that I start to pick out things and insert them a bit more neatly | 09:53 |
| olofk | Yeah. That's my workflow too. There's probably a git-ier way to to do it, but it feels safer to have two physical copies. | 09:55 |
| olofk | Strange use of physical, come to think of it. It's not like I print it, or store on a punch card | 09:56 |
| stekern | I think for me it's also that I've been to lazy to figure out how to get a external diff/merge tool to actually apply merges to the working tree | 10:07 |
| stekern | *too | 10:07 |
| stekern | I mean, it does when you resolve conflicts, but (for me) it doesn't if you just do a git diff with the external tool | 10:08 |
| _franck_ | let's say you have a while(1) loop in a verilog testbench. You want icarus to stop when Control-C is hit, calling vvp with -n is enough ? | 13:05 |
| _franck_ | olofk: I moved jtag_vpi to my own repo. I added a testbench. Now I would like to run a sim from orpsoc. | 15:24 |
| _franck_ | this is mu CAPI file: http://pastebin.com/3thdn025 | 15:24 |
| _franck_ | error: Unable to find the root module "orpsoc_tb" in the Verilog source. | 15:28 |
| _franck_ | http://pastebin.com/Hzze3khg | 15:28 |
| _franck_ | how can I tell orpsoc that ./bench/jtag_vpi_tb.v is the testbench ? | 15:30 |
| stekern | I didn't know you could change your github name | 17:25 |
| _franck_ | me too :) No more than once | 17:37 |
| olofk | _franck_: orpsoc_tb is hardcoded atm. I haven't gotten around to fix that. In the meantime, maybe you could add wrapper called orpsoc_tb that instantiates your real testbench | 19:07 |
| olofk | And I'll put it on my todo list to fix that | 19:08 |
| _franck_ | olofk: ok thanks | 20:32 |
| andresjk | does power management of the OR1200 is supported by linux? | 21:23 |
| andresjk | seems to me that the signals in the top design are not connected | 21:43 |
| andresjk | idle.c doesnt use the pm spr | 22:01 |
| --- Log closed Sat Aug 24 00:00:25 2013 | ||
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