IRC logs for #openrisc Saturday, 2013-07-27

--- Log opened Sat Jul 27 00:00:44 2013
mor1kx[mor1kx] skristiansson pushed 4 new commits to master:
mor1kxmor1kx/master 36eca1b Stefan Kristiansson: immu: add support for hardware tlb reload...07:46
mor1kxmor1kx/master 97de73e Stefan Kristiansson: cappuccino/lsu: use fsm to control external bus accesses...07:46
mor1kxmor1kx/master 07dc71e Stefan Kristiansson: dmmu: add support for hardware tlb reload...07:46
stekernthere it is07:46
stekernjeremybennett: I have a lot of fails when I run the or1ksim testsuite, I assume that's not to be expected?08:53
stekernah, I see... the test are conditioned on istarget or1k-*-*11:31
stekernoh, and I was actually using peters repo13:28
jeremybennettstekern: That looks like just a transitional problem as we move from or32 to or1k. I'd really like to get Or1ksim agnostic of whether the target is or1k or or32.14:07
stekernyeah, nm me atm, I'm just a bit confused ;)15:24
stekerntrying to test the tick timer change, and push that15:24
stekernjeremybennett: there's at least one critical patch in pgavins repo, are you cool with me pulling that into the tests and pusing that as well when I'm at it?15:26
stekernthis is the patch in question:
olofkOops...I totally forgot about the teleconf. Went on a short vacation instead. Can anyone enlighten me on what was said?23:18
olofkand why is there both a wb_ram_b3 and a ram_wb module in orpsocv2?23:35
--- Log closed Sun Jul 28 00:00:46 2013

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