| --- Log opened Fri Jul 26 00:00:43 2013 | ||
| stekern | another step towards working dtlb hw reload, just squashed a bug where dbus_sel_o would be asserted when a tlb reload happens during a store and dcache is enabled, but the address is not in cache | 05:08 |
|---|---|---|
| stekern | made the SLOB allocator very unhappy | 05:08 |
| stekern | *dbus_sel_o would be asserted *wrong* | 05:09 |
| stekern | made me take a close look at the SLOB code, something I probably wouldn't have done without that bug | 05:10 |
| stekern | conclusion: bugs are very educational | 05:11 |
| stekern | now it crashes when trying to access the uart via the address 0xbc000004, but so does qemu with the hw dtlb reload on linux 3.9 too | 05:28 |
| stekern | so that's probably a more fundamental bug than an rtl bug | 05:29 |
| stekern | oh, I see the problem... the pagefault handler isn't exactly called the same way from the dtlb miss vector and the dpagefault vector | 07:19 |
| stekern | quick and dirty hacking past that leads us to the next bug queueing for the guillotine | 09:33 |
| stekern | heh, I forgot the ata emulation in the kernel, no wonder it generates a bus error | 09:52 |
| stekern | so, the dtlb hw reload actually seems to be working now | 10:01 |
| stekern | yay | 10:01 |
| stekern | it boots on de0-nano as well! ;) | 14:31 |
| stekern | I guess it's time to clean things up and start pushing to openrisc/mor1kx | 15:15 |
| stekern | then we have some things to sort out in the sw/hw interface, but I think the ml os more siited for that discussion | 15:17 |
| stekern | *is and suited | 15:18 |
| juliusb | no way! with both hw tlb loading?!? | 15:22 |
| stekern | yup | 15:30 |
| jeremybennett | anyone joining the ORConf phone call? | 17:00 |
| jeremybennett | Sitting here all lonely :( | 17:00 |
| stekern | not all alone anymore ;) | 17:04 |
| jeremybennett | Indeed not. | 17:04 |
| jeremybennett | stekern: we've lost you. Just spoken to juliusb and he is about to join | 17:09 |
| stekern | yeah, I noticed, I'll call again | 17:09 |
| juliusb | breaking up a bit there | 17:13 |
| mor1kx | [mor1kx] skristiansson pushed 5 new commits to master: https://github.com/openrisc/mor1kx/compare/164a8707d7b6...496c3bc19798 | 18:16 |
| mor1kx | mor1kx/master 65ae1aa Stefan Kristiansson: icache: fix invalidate while refill bug... | 18:16 |
| mor1kx | mor1kx/master e195256 Stefan Kristiansson: immu: line up input/output port declarations... | 18:16 |
| mor1kx | mor1kx/master ef2224d Stefan Kristiansson: immu: ack all spr accesses to the immu spr group... | 18:16 |
| --- Log closed Sat Jul 27 00:00:44 2013 | ||
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