IRC logs for #openrisc Thursday, 2013-05-23

--- Log opened Thu May 23 00:00:11 2013
midwinterHi there01:40
midwinterI'm just reading up on OpenRisc for the first time.... would anyone happen to know an approximate minimum size (say in gates or slices) of an FPGA to get an OpenRisc core to boot linux?01:41
midwinterThe largest FPGA that I can find in a solderable TQFP (ie. non-BGA) package is a Xilinx Spartan 6 XC6SLX9 that has about 10k slices01:53
stekernmidwinter: I think you should be able to fit it onto that02:20
midwinterstekern: thanks.  A lot of the boards I'm seeing for the OpenRisc have 20k slices, which makes me a little nervous, but I can't find anything larger than 9k in a solderable package02:22
stekernyou probably can't fit much more than an openrisc core, uart and a memory controller02:26
midwinterI was hoping to write a camera controller in there too, but it should *ideally* be just some clocks and FIFOs hitting the SDRAM02:28
midwinterWill any of the OR cores work for linux, or do you have to use the OR1200 specifically?02:30
stekernmor1kx-cappuccino and or1200 are the ones that have MMUs (= can boot linux)02:31
midwinterwonderful, thanks for your help02:36
midwinterI'm working on the next model of a handheld device for my open source science tricorder project (, and I'm having trouble balancing the design requirements with a conventional microcontroller or microprocessor02:41
midwinterI've often used PICs, but they're often quite slow for display related things in that they don't have enough memory to do double-buffering02:41
midwinterin one design, I used an ARM9 to run linux, and it had 32meg of SDRAM, which was wonderful -- you didn't have to worry about agressive optimization just to display a bitmap02:42
midwinterbut it was complicated and power hungry, and now all those chips are in BGAs largely02:42
midwinterso I was thinking of trying out an FPGA this time, that has the option of running linux.  I've only done a little bit of FPGA-based projects before, so it'd be a neat learning project.02:43
midwinterbut only if it has a good chance of working, of course02:43
stekernoh, there seems like there is a chance that this: might work on the onda table to get access to UART0 and JTAG06:47
stekernat least if the sd-card slot is connected to SDC0_xxx06:48
stekernhno: have I understood it correctly, that in FEL boot, you're basically just able to read write the SRAM?06:53
stekernand the tool that it seems like you wrote does exactly that?06:53
stekernso if I'm not completely out in the woods, I believe I should be able to load some code for ar100 and a baremetal arm program to kick it alive using that tool06:59
stekernand then use the uart pins from the SD-card slot to get some input/output to it07:00
stekernthat almost sounds too simple to be true07:00
olofk_jtagconfig says No JTAG hardware available. What to do? :)07:02
olofk_Do I need kernel drivers?07:02
stekernumm, no07:07
stekernI have this:07:07
stekerncat /etc/udev/rules.d/60-usbblaster.rules07:07
stekernATTR{idVendor}=="09fb", ATTR{idProduct}=="6001", MODE="0666"07:07
olofk_The udev rule is added, but still no luck.07:08
stekernis jtagd running?07:09
olofk_Now it is :)07:09
olofk_But still no luck. Should I expect something to turn up in /dev?07:09
stekernwhat does lsusb say?07:10
olofk_lsusb can find it07:10
olofk_Bus 001 Device 011: ID 09fb:6810 Altera07:10
olofk_Do I need to run something as root?07:10
stekernand you did put that PID in your udev rules?07:11
stekern(it differs from mine)07:11
olofk_Works as root. That's good enough07:12
olofk_Yeah, 6810 is in my udev rule07:12
olofk_Now I can resume the workshop :)07:13
stekernI think you should be able to use it as non-root if you kill jtagd and start it as your user07:14
stekernor something like that07:14
olofk_I'll try that later when I get home07:14
stekernyeah, concentrate on the workshop now so you know what to teach me before mine ;)07:15
olofk_It turns out that I'm a parody of a linux user. I have to start the workshop by recompiling the kernel :)07:16
stekernif it wouldn't be SDC0 that is routed to the card slot, I think I still should be able to do some UART bitbanging07:29
hnostekern, yes. But you likely need to enable some clocks for the AR100 too.07:45
hnoand it's almost certainly SDC0 that is routed to the sdcard slot. It's the reference and intended design and no one steers from it (except.. well another story)07:49
hnoI would start with simple bitbanging to indicate any sign of life. The UARTs requires a bit of preparation to use (clock, clock gate, baud rate)07:51
stekernhno: yeah, I agree, toggling the pins is probably a good starting point08:03
stekern(enable clocks) true, but I think I should get all that info from how it's done in the kernel08:04
hnoIf there is something you don't find just ask and I'll dig it out for you.08:07
hnoand the SoC is very similar to earlier generations.08:07
stekerndon't worry, I probably will =P08:40
stekernhno: I think you are right about SDC0, if I read this (slightly confusing) code right:;a=blob;f=arch/arm/lib/board.c;h=5bd528e4ad49ca305eb176db3520309c2d5c72a7;hb=refs/heads/allwinner-sunxi-a31#l47509:45
stekernthe value -1 that I find in the extracted config from the firmware I'm running on the tablet should mean SDC009:47
stekernline 3009:47
hnostekern, yes, but line 768 is the right one. And it's SDC0 in SoC port PF as usual. Even dedicated SD-detect pin connected so you have an easy GPIO input to play with too.09:51
stekernah, yes, there you get the info without reading the u-boot code, hadn't got that far, just searched for the "storage_type" string09:54
olofk_Everytinh is working fine at the workshop. +1 for linux support11:53
andresjkthe user app and ocspi driver interfacing is done by api or systemfile? I cannot see any ioctl within the .c of the driver so I guess is by API. The spi header don't have the prototypes of the functions implemented. Anyone knows where they are?16:52
andresjkNevertheless, it does compile after some minor changes in the spi_opencores.c16:53
-!- olofk_ is now known as olofk20:53
olofkstekern: I did something incredibly stupid at the workshop. The ARM stuff required to be locked to a NIC, and since I was using a tethered android phone, that was what it chose to use20:55
olofkSo now I need to have the damn phone connected in tether mode everytime I want to use the ARM debugger, which is a major pain since that uses one of the only two USB ports on my computer20:56
--- Log closed Fri May 24 00:00:12 2013

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