--- Log opened Mon Apr 01 00:00:55 2013 | ||
-!- Netsplit *.net <-> *.split quits: serp_ | 02:21 | |
juliusb | stekern: SR[F] should be writable by a l.mtspr instruction right? | 13:11 |
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juliusb | according to the spec that's OK | 13:11 |
juliusb | although, the SR[FO] bit is also listed as writable :-s | 13:12 |
juliusb | http://opencores.org/or1k/Architecture_Specification#Writable_bits_in_SR | 13:15 |
juliusb | That's what I reckon | 13:15 |
stekern | yup | 13:33 |
juliusb | Ok I'll push a fix to the pipelines which allows the writing of the flag bit | 14:56 |
mor1kx | [mor1kx] skristiansson pushed 4 new commits to master: https://github.com/openrisc/mor1kx/compare/31b298e235e8...be5860889394 | 14:58 |
mor1kx | mor1kx/master 131c07d Stefan Kristiansson: icache, dcache: fix invalidate on first write for 1-way cache | 14:58 |
mor1kx | mor1kx/master e3d9728 Stefan Kristiansson: cappuccino/fetch: hold the bus line for ic during refill | 14:58 |
mor1kx | mor1kx/master 1b1a6f4 Stefan Kristiansson: icache: only ack during refill when ic_access_i is asserted... | 14:58 |
mor1kx | [mor1kx] juliusbaxter pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/be5860889394...cfddf6beff84 | 15:00 |
mor1kx | mor1kx/master 0fad861 Julius Baxter: pronto: make stepping work with TCM fetch unit | 15:00 |
mor1kx | mor1kx/master cfddf6b Julius Baxter: all pipelines: Make SR[F] writable by l.mtspr | 15:00 |
juliusb | also some updates for mor1kx-dev-env which allow me to Verilator-ify (Verilate?) my pronto-with-TCM system | 15:03 |
stekern | verilatorify sounds fancier ;) | 15:04 |
juliusb | ... by specifying the path to the CPU as a define | 15:04 |
stekern | that reminds me that I had to add a unistd.h to all the files that are using pipe,read,write etc when I updated my system to kubuntu 12.10 | 15:05 |
juliusb | oh really?! | 15:05 |
juliusb | your upgradaholicism causing you issues yet again | 15:05 |
juliusb | haha, sorry, I'm abusing the language a little too much today | 15:06 |
juliusb | as I've stated before, my position is if my set up works, I don't touch it | 15:07 |
stekern | yeah, but I needed python3-networkx, and that wasn't in 12.04 | 15:07 |
juliusb | I'm on 11.04 | 15:07 |
juliusb | ah right | 15:08 |
stekern | I guess the gcc version just is a bit pickier | 15:08 |
stekern | gcc version 4.7.2 (Ubuntu/Linaro 4.7.2-2ubuntu1) | 15:08 |
juliusb | huh Linaro?! | 15:08 |
juliusb | Isn't that for ARM? | 15:08 |
stekern | no wonder everything broke on my x64 then ;) | 15:08 |
juliusb | :P | 15:09 |
juliusb | I'm surprised to see them advertised on a x86 Linux build | 15:09 |
stekern | nah, isn't linaro just doing generally stuff for ubuntu? | 15:09 |
juliusb | I thought they were specifically Linux on ARM | 15:09 |
stekern | I took a look at the waveforms when running dhry, looks like it's only jumps and stores that is > 1 ipc now | 15:14 |
stekern | juliusb: how is the instructions/sec calculated in the mor1kx monitor summary btw? | 15:19 |
stekern | maybe what I'm asking is, what is it showing? instructions/(host time sec) or instructions/(simulated system time s) | 15:22 |
stekern | nm, it's simulated system time | 15:26 |
stekern | running dhry I get around 74% instructions executed in relation to elapsed time | 15:27 |
stekern | and around 80% in coremark | 16:31 |
stekern | so, my plans for the coming weeks: resolve all branches in decode stage, make bus_if runtime burst configurable and then put cappuccino on a diet | 16:52 |
stekern | because he's obese as it is now... | 16:53 |
juliusb | haha, skim milk cappuccino? :) | 18:37 |
--- Log closed Tue Apr 02 00:00:57 2013 |
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