IRC logs for #openrisc Monday, 2013-04-01

--- Log opened Mon Apr 01 00:00:55 2013
-!- Netsplit *.net <-> *.split quits: serp_02:21
juliusbstekern: SR[F] should be writable by a l.mtspr instruction right?13:11
juliusbaccording to the spec that's OK13:11
juliusbalthough, the SR[FO] bit is also listed as writable :-s13:12
juliusbhttp://opencores.org/or1k/Architecture_Specification#Writable_bits_in_SR13:15
juliusbThat's what I reckon13:15
stekernyup13:33
juliusbOk I'll push a fix to the pipelines which allows the writing of the flag bit14:56
mor1kx[mor1kx] skristiansson pushed 4 new commits to master: https://github.com/openrisc/mor1kx/compare/31b298e235e8...be586088939414:58
mor1kxmor1kx/master 131c07d Stefan Kristiansson: icache, dcache: fix invalidate on first write for 1-way cache14:58
mor1kxmor1kx/master e3d9728 Stefan Kristiansson: cappuccino/fetch: hold the bus line for ic during refill14:58
mor1kxmor1kx/master 1b1a6f4 Stefan Kristiansson: icache: only ack during refill when ic_access_i is asserted...14:58
mor1kx[mor1kx] juliusbaxter pushed 2 new commits to master: https://github.com/openrisc/mor1kx/compare/be5860889394...cfddf6beff8415:00
mor1kxmor1kx/master 0fad861 Julius Baxter: pronto: make stepping work with TCM fetch unit15:00
mor1kxmor1kx/master cfddf6b Julius Baxter: all pipelines: Make SR[F] writable by l.mtspr15:00
juliusbalso some updates for mor1kx-dev-env which allow me to Verilator-ify (Verilate?) my pronto-with-TCM system15:03
stekernverilatorify sounds fancier ;)15:04
juliusb... by specifying the path to the CPU as a define15:04
stekernthat reminds me that I had to add a unistd.h to all the files that are using pipe,read,write etc when I updated my system to kubuntu 12.1015:05
juliusboh really?!15:05
juliusbyour upgradaholicism causing you issues yet again15:05
juliusbhaha, sorry, I'm abusing the language a little too much today15:06
juliusbas I've stated before, my position is if my set up works, I don't touch it15:07
stekernyeah, but I needed python3-networkx, and that wasn't in 12.0415:07
juliusbI'm on 11.0415:07
juliusbah right15:08
stekernI guess the gcc version just is a bit pickier15:08
stekerngcc version 4.7.2 (Ubuntu/Linaro 4.7.2-2ubuntu1)15:08
juliusbhuh Linaro?!15:08
juliusbIsn't that for ARM?15:08
stekernno wonder everything broke on my x64 then ;)15:08
juliusb:P15:09
juliusbI'm surprised to see them advertised on a x86 Linux build15:09
stekernnah, isn't linaro just doing generally stuff for ubuntu?15:09
juliusbI thought they were specifically Linux on ARM15:09
stekernI took a look at the waveforms when running dhry, looks like it's only jumps and stores that is > 1 ipc now15:14
stekernjuliusb: how is the instructions/sec calculated in the mor1kx monitor summary btw?15:19
stekernmaybe what I'm asking is, what is it showing? instructions/(host time sec) or instructions/(simulated system time s)15:22
stekernnm, it's simulated system time15:26
stekernrunning dhry I get around 74% instructions executed in relation to elapsed time15:27
stekernand around 80% in coremark16:31
stekernso, my plans for the coming weeks: resolve all branches in decode stage, make bus_if runtime burst configurable and then put cappuccino on a diet16:52
stekernbecause he's obese as it is now...16:53
juliusbhaha, skim milk cappuccino? :)18:37
--- Log closed Tue Apr 02 00:00:57 2013

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