| --- Log opened Tue Mar 26 00:00:25 2013 | ||
| --- Day changed Tue Mar 26 2013 | ||
| glowplug | Interesting.... | 01:05 |
|---|---|---|
| stekern | certainly | 04:42 |
| -!- Netsplit *.net <-> *.split quits: Gentlema`, _franck_, serp_ | 09:06 | |
| stekern | isn't it beautiful?: http://oompa.chokladfabriken.org/tmp/1cycle_loads.png | 20:08 |
| stekern | it's still a bit buggy, but dhry on de0-nano says: DMIPS / DMIPS/MHz: 69 / 1.380000 | 20:12 |
| stekern | before it was 1.16 | 20:13 |
| glowplug | Nicely done! | 20:20 |
| glowplug | Also I want to thank you for that link to Migen again I would have never found that. I'm going to learn it and hopefully I can contribute something soon. =) | 20:21 |
| stekern | heh, np | 20:23 |
| stekern | I think it could be very useful for building the SoC with it, not sure if I'd do any cores with it though | 20:26 |
| glowplug | It would lend itself extremely well for glue code. | 20:26 |
| glowplug | My current goal is to try and impliment an extremely simplistic SIMD vector CPU in Migen. If the Verilog ends up being totally unusable and horrifying then I will probably strap down and learn Verilog directly. | 20:27 |
| glowplug | Then my goal after that is to try and tie it with mor1kx as a co-processor. If that is even possible. Haha | 20:28 |
| stekern | I can't see why it wouldn't, as long as what it does fit's the SIMD instructions | 20:28 |
| stekern | I think that's how juliusb did the FPU in or1200, he took an external floating point core and hooked it up to the FPU instructions | 20:30 |
| glowplug | But there is no FPU for mor1kx correct? | 20:30 |
| stekern | no | 20:30 |
| glowplug | Ahh ok cool. I mentioned the idea to him a few days ago and he said that there was no plans for SIMD I wasn't sure if that also meant no FPU. | 20:30 |
| glowplug | If nobody else is attempting it then I think its a great place to start. =) | 20:31 |
| glowplug | I can't imagine there would be any benefit to rewriting any instructions so I will just study the OR1200 SIMD instructions. | 20:31 |
| glowplug | Theres no chance of those being re-written for OR2k? | 20:31 |
| stekern | or1200 (implementation) doesn't have simd, or1k (architecture) has ;) | 20:32 |
| glowplug | Ahh. So there is currently NO SIMD implimentation for any OpenRISC core? What a challenge! | 20:32 |
| stekern | oh, there's probably how ever much room for those being re-written | 20:32 |
| stekern | ;) | 20:33 |
| stekern | yeah, no SIMD implementation, not even the simulator supports them | 20:33 |
| glowplug | Iccarus has no SIMD support? | 20:33 |
| stekern | I'm achademically very interested in SIMD support (airy-fairy as juliusb put it yesterday), not sure how useful they'd be in reality. | 20:34 |
| stekern | no, not icarus, that's an verilog simulator. I meant openrisc simulators, or1ksim or qemu for instance | 20:35 |
| glowplug | From what I understand the ARM cpu's with SIMD can muscle through some really useful tasks that the non SIMD (or slower SIMD) CPU's really shut down with. For example the i.mx233 is a $5 ARM9 chip it struggles with youtube, fast scrolling, ect. | 20:35 |
| glowplug | The newer chips (with absolutely no VPU or GPU driver support) can muscle through those kinds of tasks. | 20:36 |
| stekern | yes, but who's going to use openrisc for youtube ;) | 20:37 |
| glowplug | Hopefully 8 billion people. ;) | 20:37 |
| stekern | I get your point though, and I think it'd be cool to have them implemented | 20:37 |
| glowplug | Airy-Fairy. Haha | 20:38 |
| glowplug | I think he said something similar about academia. Priceless. =) | 20:38 |
| stekern | if not for anything else, for the point of reviewing them in the arch spec | 20:38 |
| glowplug | These things probably are toys in all honesty. But I like toys. 8) | 20:38 |
| stekern | well, I'm not *really* academic, only in the sense of wanting to learn about it | 20:39 |
| stekern | + I'd like to play around with SIMD support in the compilers | 20:39 |
| glowplug | Another interesting thing is the path that computing is moving in general towards convergance of high speed serial and high parallel. The Xeon Phi is physical (but expensive) proof that is where computing is headed. | 20:40 |
| glowplug | Thats great! I know very little about compilers and what good is a chip without a good compiler. =) | 20:40 |
| stekern | I also would want to do a 64-bit implementation, another thing that isn't really 'needed' ;) | 20:41 |
| glowplug | I'm curious about a few things. 32-bit RISC/MIPS CPU's can address more than 4gb of memory correct? | 20:42 |
| glowplug | Intel has "Physical Address Extension" I don't know if there are any RISC implimentations. | 20:45 |
| stekern | with an MMU, yes | 20:46 |
| glowplug | I think 32-bit is a good place to be then. Although I do agree 64-bit would be extremely cool to have. =) | 20:46 |
| glowplug | Before upping bit-depth things like chip-level software transactional memory could give significantly bigger boosts to code execution. And things that interface with the Analog world wont see 64-bit conversion for awhile I think. | 20:48 |
| stekern | I agree completely, as I said, only an academic interest =) | 20:50 |
| glowplug | I wonder how much of ARMs reasoning for pushing out 64-bit chips is just popular opinion and pressure. And not actual technological progress... | 20:50 |
| glowplug | From what I understand SIMD cores get to 512 bits wide. Now THAT would be interesting. =D | 20:51 |
| glowplug | That is how intel crams 1TFLOPS double floating point into a single chip @ 200 watts. O_O | 20:53 |
| glowplug | I am also extremely interested in the architecture of the PS2 game console. It has vector-float units that can also execute regular CPU instructions. IT was truly a hybrid CPU/GPU. | 20:55 |
| glowplug | Are there any OpenCores that you are aware of that supports GLSL? | 21:11 |
| stekern | ok, modified dcache boots linux in verilator now at least | 21:41 |
| stekern | not on the de0-nano board at all ;) | 21:41 |
| stekern | juliusb: can you simulate uart input somehow? | 21:45 |
| stekern | most certainly you can, if you put enough into it, but can you easily? | 21:46 |
| juliusb | stekern: your waveform is a thing of beauty | 22:48 |
| juliusb | umm good questino about UART input I was thinking about doing it sometime - it would be pretty leet | 22:48 |
| juliusb | it's just C | 22:48 |
| juliusb | would be easy to sscanf stdin or whatever | 22:48 |
| juliusb | awesome work, btw, getting the cappuccino verilator-friendly | 22:53 |
| juliusb | i'm attempting to get freertos running on prontoespresso | 22:53 |
| juliusb | it runs, at least | 22:53 |
| juliusb | looks good | 22:53 |
| juliusb | i think the issues are software, not hardware | 22:53 |
| juliusb | it assumed the wrong way to clear interrupts, that was one thing | 22:54 |
| juliusb | otherwise it was all good | 22:54 |
| juliusb | only 1 instruction in delay slot (admittedly a critical one :P) which was a problem | 22:54 |
| juliusb | but.. otherwise it looks like it kind-of runs doing what it should | 22:54 |
| juliusb | (I'm also running it in the cycle-accurate model) | 22:54 |
| --- Log closed Wed Mar 27 00:00:48 2013 | ||
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