IRC logs for #openrisc Saturday, 2013-03-23

--- Log opened Sat Mar 23 00:00:35 2013
GentlemanEngineeThe RM just posted that their graders are hitting 8 - 15 foot drifts.00:07
glowplugHoly crap that is insane.  O_O00:07
GentlemanEngineeI am beginning to doubt that I will be able to get anywhere in the morrow...00:07
glowplugAre you working from home these last few days?00:08
GentlemanEngineeTook today off.00:08
GentlemanEngineeThis in despite of the work that needs to be done.00:08
glowplugBadass.  It's like a school snowday.  Haha00:08
glowplugClearly you picked the more important project to work on.  8)00:08
GentlemanEngineeIn fact, I was asked to come in tomorrow to attempt to finalize my fix that will hopefully alleviate a production issue.00:09
glowplugIf you don't mind me asking what does your company do?00:09
GentlemanEngineeDesigns and manufactures equipment (mainly for transmission of HD Video).00:10
GentlemanEngineeAlso, some equipment for WiMax.00:10
glowplugVery cool.  Wireless transmission or wired?00:11
glowplugVery cool.  Have you worked with software defined radios?00:11
GentlemanEngineeHowever, the majority is for wired transmission.00:11
GentlemanEngineeI have not yet had the opportunity.00:11
GentlemanEngineeHowever, I am wishing to rectify this grave oversight.00:11
glowplugIt is grave.  SDN is absolutely amazing.00:12
glowplugSDN is like homecmos and opencores in that it will open up the airwaves, networks and cellphones to the people.00:13
GentlemanEngineeI am eagerly anticipating the adoption of Whitespace Rules here similar to what you FCC has adopt.00:13
GentlemanEngineeUp to four Watts of transmission power.00:14
glowplugFour watts.  I hate governments so much.  Haha00:15
GentlemanEngineeFour Watts is a fair amount. Transmission of tens of kilometers...00:16
glowplugWe would all have free cell and internet access if it wasn't for band regulation.  So frustrating.00:16
GentlemanEngineeWith this, Internet access could be applied.00:17
GentlemanEngineeIn fact, Rural Internet Access was one of the driving points behind this move.00:17
glowplugWe have a project here in Detroit, its actually the first in the world that I'm aware of to create a wireless mesh network in the city that does not depend on any ISP's ect.00:17
glowplugBut it is severely limited by regulation.  And their approach is way worse than what is possible.00:18
GentlemanEngineeI would definitely appreciate having more than a (theoretical) 2Mbps download.00:18
GentlemanEngineeThe Detroit Project should look at the Whitespace Regulations.00:19
GentlemanEngineeIt would completely change their setup.00:19
glowplugI'm sure they know about it.  They have been trying to do a mesh network for years.00:19
glowplugActually this is very interesting.  Apparently they could have a 30 mile range.  This post is from 2008 though.00:22
GentlemanEngineeMy nearest neighbour is ~1/2 mile away.00:22
GentlemanEngineeI also have two neighbours ~1 and 1-1/2 miles away.00:23
glowplugYou can get 1/2 mile range with standard wifi already though.00:24
glowplugThe challenge is spanning 300 mile gaps of desert and/or mountains.00:25
GentlemanEngineeYes I am aware. However, it would be of little utility except for exchanging files.00:25
glowplugYou could share a single internet charge.  =)00:26
GentlemanEngineeWe are both already hitting B/W issues.00:26
glowplugAhh I see.00:27
GentlemanEngineeI am using a microwave link (provided by a subsidiary of my firm) to a tower that is ~40km away.00:27
glowplugThats how you get internet?  That is amazing.  Haha00:28
glowplugIt is highly directional then?00:28
glowplugAlso this whitespace thing is extremely interesting I can't believe this isn't all over the news.00:29
GentlemanEngineeIt is indeed.00:29
glowplugApparently there are already retail software defined radios that can determine which whitespace they are allowed to use and then use those bands.00:29
GentlemanEngineeI have a directional antenna on my roof.00:30
glowplugVery cool.00:32
glowplugIt looks like the BladeRF unit I linked to you before should be able to take advantage of whitespace bands.00:32
GentlemanEngineeYes. However, I was wishing to build my own.00:32
GentlemanEngineeThis could be done with an FPGA.00:32
GentlemanEngineeIn fact, it is another application that the Development Board could be used for...00:33
glowplugThose kinds of devices are a serious pain in the ass.  The analog domain is a very scary place.  O_O00:34
GentlemanEngineeAll digital devices are created with analog components.00:34
glowplugI wouldn't touch SDN with a 20 foot pole unless I had a massive budget.00:34
glowplugSoftware Defined Radio00:35
GentlemanEngineeSo, SDR.00:35
glowplugAhh yes SDR.  =)00:35
GentlemanEngineeSome fellows are doing so with a rather small budget.00:35
glowplugIf you are really comfortable designing low noise PCB's then go for it.  But there is no way I'm going to attempt it. Hah00:36
glowplugThe BladeRF guys?00:36
glowplugThey have 1/4 million to work with.00:37
GentlemanEngineeNo, I was referring to hobbiests.00:37
glowplugThere are DIY FPGA SDR boards?00:38
GentlemanEngineeI had come across something. However, I did not have the time to investigate further.00:39
glowplugTime to investigate.  =)00:40
glowplugThis might be it.00:50
glowplugVery interesting stuff in there...00:50
GentlemanEngineeQuite likely...00:52
glowplugI might have another IRC channel to join...00:58
glowplugI actually can't find the IRC channel for the HPSDR project..01:08
glowplugSo they dont use IRC and they use SVN.  Things are not looking good for the HPSDR people.  O.o01:11
GentlemanEngineeI see you are in the Linus Group...01:25
glowplugLinus group?01:34
glowplugApparently SDR's can be DIY'd look at this.
glowplugHe is a PHD but it is a working 2 layer DIY SDR.01:34
GentlemanEngineeIn regards to Revision Control.01:34
GentlemanEngineeThat is interesting, and doable.01:34
GentlemanEngineeWhat silicon is he using?01:35
glowplugLooks like a gigabit ethernet ic, an analog to digital converter, and a spartan xcs3s500e fpga.01:38
glowplugIt really is not that complicated of a board.  The BladeRF people make it look a lot harder than it is.01:38
glowplugOf course again he is a PHD so...01:38
glowplugI wish he would post schematics.  =(01:40
glowplugApparently his boards are single layer.  Haha01:42
glowplugShould be able to copy them by the pictures in that case.01:42
glowplugYou know what.  This is actually awesome.01:42
glowplugIf I design the FPGA board as a SO-DIMM module then all that needs to be designed is a single layer "motherboard" with the A/D converter and BNC connector.01:43
GentlemanEngineeThat would work.01:44
GentlemanEngineeThe FPGA Board could be used with a number of "motherboards" allowing for differing functionality.01:45
glowplugThat was my original plan.  But I never intended to actually design one.  Haha01:46
glowplugIt seems like the SDR mainboard would be extremely simple though.01:46
GentlemanEngineeLeave some space for some op-amps.01:47
glowplugActually it needs an A/D ic and D/A ic to be a transceiver.01:47
GentlemanEngineeI meant to allow for amplifying the signal prior to the A/D, if necessary.01:48
GentlemanEngineeAlthough, the other direction may be nice as a buffer.01:49
glowplugIt's hard to tell what each IC is in his design.01:49
GentlemanEngineeI imagine if you were to email him, he would be willing to part with schematics.01:54
glowplugThats a good idea.  Maybe I will have more luck with him than with Numato.  Haha01:54
GentlemanEngineeStill no word?01:57
glowplugNothing from them no.  Thats ok I don't want their board anyways.  =)01:59
glowplugWe have a little bit of a problem though.  Apparently his ADC is $90.  Haha02:00
GentlemanEngineePerhaps you should lith up some less expensive alternatives...02:01
glowplugWorking on it.  Haha02:01
GentlemanEngineeAs long as it is done by Monday...02:01
glowplugIs the best I can do.02:39
glowplugIt's $70 has higher power output and the same sampling rate.02:39
glowplugThis will not be a cheap board....02:39
GentlemanEngineeRaffle it off.02:53
glowplugFor the DAC02:54
glowplugSo thats pretty much it.  The entire thing is basically a BNC connector a DAC and a ADC.  It will still be about $120.02:55
GentlemanEngineeI was jesting about raffling off boards to pay for your own.02:55
glowplugI know.  =)02:59
glowplugWhat do you think about seperate boards for receiving and transmitting?03:00
glowplugIf both were connected to the same host you could do transciever type stuff (wifi/gsm ect.).  Or use individual boards to do transmit only (fm radio) or receive only (ham type stuff).03:01
GentlemanEngineeThat is not a poor idea.03:08
GentlemanEngineePerhaps if these two boards were designed s/t they may connect to each other.03:09
glowplugThat would make scaling pretty easy too.  If you need more transmit bandwidth just add more boards.03:09
GentlemanEngineeAlthough, we should concentrate on the FPGA board.03:09
glowplugHave you done board design before?03:10
glowplugIf you want to take a crack at the TX/RX mainboards I can send you KiCad file.03:13
GentlemanEngineeI could.03:14
GentlemanEngineeI am focussing on the FPGA Memory Controller, though.03:14
glowplugAhh I see.  Well I will leave the TX/RX boards for later then.  =)03:16
GentlemanEngineeI believe that would be best.03:17
GentlemanEngineeThey will be of little use until there is an FPGA Board to use them.03:18
glowplugWell the TX/RX boards don't actually need RAM.  But since the modules are only $5 theres no point in changing the FPGA module just for the SDR.03:20
GentlemanEngineeEspecially if one wishes to do some processing on them.03:21
glowplugIs anyone familiar with LVDS for data transmission?03:22
GentlemanEngineeI have done a little.03:22
GentlemanEngineeKeep the traces parallel, with equal impedance.03:23
glowplugI've seen a project where LVDS was routed using SATA cables.  I think its a fantastic idea for linking the SDR modules together at extremely low latency.03:26
glowplugGood morning.  =)03:26
GentlemanEngineeIs it already?03:26
glowplugBut I have absolutely no idea how to use LVDS as GPIO in Linux.03:26
stekern5:25 here03:26
glowplugAre you familiar with LVDS Stefan?03:27
GentlemanEngineeIt depends on how one wishes to encode the information.03:28
stekernnot much03:28
GentlemanEngineeOne usually uses some manner of tranceiver, though.03:28
glowplugThe FPGA would be the tranceiver.03:29
glowplugAnd I want to communicate with the host PC over LVDS instead of ethernet.03:29
GentlemanEngineeI have not had experience with that.03:31
GentlemanEngineeHardware only.03:31
glowplugIt can get up to 3 Gbit/s apparently.03:33
glowplugThe latency of LVDS is also way way lower than ethernet.03:36
GentlemanEngineeEthernet would be much simpler, though.03:36
GentlemanEngineeI would say that LVDS would be a Rev. 2 Improvement.03:36
glowplugI'm not giving up that easy.  8)03:38
glowplugFor another day though.  Heading to bed.  :D03:38
GentlemanEngineeHow is stekern?03:40
stekernFine, thank you very much03:40
GentlemanEngineeI am still snowed in.03:41
GentlemanEngineeNeighbours are attempting to dig a path themselves with their tractors.03:42
stekernsounds extreme, we're never get that kind of extreme weather over here03:43
stekernat least not in the southern regions03:44
GentlemanEngineeI understand that the Northern Regions even have their own aboriginal population.03:47
stekernyeah, the sami people03:49
GentlemanEngineeI must admit that from my viewing of pictures, they appear rather much the same as other Scandanavians.03:51
stekernyou mean the physical appearance?03:54
GentlemanEngineeI understand the culture is somewhat different, though.03:57
stekernyes, they are very "nature"-oriented03:59
stekernbut on the other hand, people up north are in general more nature-oriented than down south too04:01
GentlemanEngineeI wonder how similar the culture would be to aboriginals here.04:01
GentlemanEngineeI can tell you that those living in remote locations have a tendency to be more nature-oriented.04:02
stekernok, bug identified, it's not in mor1kx at all, but in my xilinx ddr2 mem controller wrapper...16:26
juliusbI've found that my bug fix causes a combinatorial loop :-/16:26
stekernhave you got any pastebins of it?16:27
juliusbbasically the bug is to do with immediately returning from exception to another asynchronous IRQ16:27
juliusbso from tick to IRQ, or vice versa16:27
juliusbof.... the test code?16:28
stekernyes, or your bugfix16:28
juliusbsorry, of the test software or the RTL?16:28
juliusbbasically one bug was of the EPCR was being set to the vector we were just l.rfe'ing from if we immediately did another exception16:29
juliusbinstead of staying the same and servicing the next exception16:30
juliusbalso, we didn't do the tick-timer IRQ properly, if l.rfe'ing from an IRQ16:31
juliusbsorry, didn't go to the tick exception if doing l.rfe from an IRQ exception16:31
juliusba bug in the address generation16:31
juliusbthat's the software test16:36
stekernah, ok, yeah I can imagine that happening16:38
stekernhave you ran that against cappuccino?16:38
juliusbnot yet16:39
stekernotoh, you can't push cappuccino that hard with the int and ticks anymore16:39
juliusbjust wanted to run vlt-tests and check everything16:39
juliusband noticed comb loop :(16:40
stekerna couple of those tests in your repo are currently not working with cappuccino16:40
stekernit gets into a loop, where it just rfeing to a branch and then get the timer exception in the delay slot16:41
stekernI have patches for all of those16:41
stekernbut not sure if you want to take them16:42
stekernthey are here anyways:
juliusboh patches to the SW?16:44
stekernyes, the tests16:46
stekernwe should really have those tick values being pipeline specific16:47
juliusbah yep 16:47
juliusbfair call16:47
stekernbut I've been lazy and just tweaked them16:47
stekernthe or1k-tickloop is ok though, it just fixes the issue without changing the test16:49
juliusbthat's the only thing you changed? just tick loop times?16:49
stekerndon't know why I haven't sent you a pull request for that + the or1k-systemcall change :/16:49
stekernyes, in or1k-shortjump, or1k-timer and or1k-ticksyscall I've just changed the tick loop times16:50
stekernthe intloop fails on cappuccino too, and it's not getting stuck in a loop, just exists with an exit(0)16:52
stekernno 0x8000000d or 0xbaaaaaad16:52
juliusbhmm OK interesting16:59
juliusbfound a fix for my comb loop! But another test is failling...insnfetcherror!17:00
stekernI still need to completely figure out what's failing in the xilinx ddr2 wrapper, it's something to do with acking during bursting17:13
stekernthen I'll take a look at your new fancy test ;)17:14
juliusboh it's cool I'll check that out for the other pipelines17:17
juliusbah I had accidentally tied something low in cpu_prontoespresso when updating with some new ports you'd added17:22
juliusbinsnfetcherror passing again...17:23
stekernah, yeah, I probably should have done that update... didn't think about that I changed some of the generic modules17:32
juliusbnp, is trivial (although I still managed to screw it up :P)17:38
juliusbwasn't paying attention17:38
juliusbi was redefining a module instantiation port automatic thing from a signal to 017:38
juliusblike, 2 lines below where it was written\17:39
stekernI want to look at the fail btw, it's good to see and understand what's wrong17:41
juliusbwhich? the int/tick overlapping test?17:41
juliusbwell my updates don't appear to have broken anything in pronto17:55
juliusbbtw loving this IRC logging thing17:57
juliusbmeans I can keep up to date with IRC from anything with a web browser17:57
juliusba cron job is set for every 10 minutes to update the logs, although it appears to fire randomly17:58
juliusb20 minutes sometimes17:58
juliusboh well17:58
juliusbOK, espresso works witht he exact same patch as pronto18:04
juliusb2 down - a frothy milk-based core to go :)18:04
glowplugThe logs really are great.  I actually like yours better than the one I suggested.  Very neat and easy to read.  =)18:10
stekern20 minute intervals is more than good enough18:42
LoneTechslowly making progress on a karnaugh diagram drawing program I doubt anyone really needs19:32
stekernLoneTech: not even yourself19:38
LoneTechwell, I've missed it a little bit, about twice19:38
LoneTechfor things like
stekernI can't recall drawing a karnaugh diagram once after graduating from university19:39
stekernwe did use the word extensively during the study time, as a pun on the word 'kanon'... (sigh, student humor...)19:41
stekern'kanon' means 'canon', but is commonly used as an expression for 'super' or 'great'19:43
LoneTechthat slang expression is from the cannon meaning, I believe19:45
LoneTechI believe kanon has at least three meanings19:45
juliusbstekern: well, wouldn't you know it -cappuccino passes this test without modifications!19:46
stekernLoneTech: yeah, that one 'n' slipped away under my fingers...19:46
stekernjuliusb: intereseting, it fails here :/19:47
juliusbjust going to sanity check this end, make sure it's doing what I think it is19:48
stekerntaking a look now, making sure I've got nothing in my working tree messing things up19:48
juliusbnope this definitely works... I think19:50
stekernoh, it works here too (I think), it just prints a couple of reports after the 0x80..0d, so I didn't see that19:51
juliusbi will just check the code19:51
juliusbyou may get a timer interrupt there19:51
stekernlooks like it's based on the tickloop, right?19:52
juliusbthe intloop/tickloop tests19:52
stekernso this should fix that too then:
juliusbah i'm just going to disable tick/IRQ in SR when we finish19:56
juliusbwe don't test for the whole thing being finished in the exception handler19:56
stekernah, right19:58
mor1kx[mor1kx] juliusbaxter pushed 3 new commits to master:
mor1kxmor1kx/master 8086c34 Julius Baxter: pronto cpu: tie off decode inputs for MMU exceptions as we don't have one20:12
mor1kxmor1kx/master 339d7d6 Julius Baxter: espresso cpu: tie off decode inputs for MMU exceptions as we don't have one20:12
mor1kxmor1kx/master 1f666b9 Julius Baxter: espresso and pronto ctrl: fix bugs with simultaneous tick and IRQ exceptions...20:12
* juliusb rediscovers the "Pull Requests" button on github20:15
juliusbI don't get it20:19
juliusbI just did the pull request20:20
juliusbthen did remote update on my local clone, and it said it downloaded some stuff, but I don't see it20:20
juliusblike, it's not updated my local copy20:20
juliusbi did a git pull20:20
juliusbbut i'm not on a branch, so it didn't work20:21
juliusbah I needed to do : git pull origin master20:24
stekernumm, are you making pull requests to yourself? ;)20:27
stekernah, now I see what you're doing20:29
glowplugGit can be a pain in the ass.  ;)20:38
stekernno no,20:44
juliusbcan anyone remind me how we run objcopy to generate a binary of stuff starting at 0xf0000000 and have it start from 0?22:00
juliusbi'm trying to emulate running from flash - so have compiled with a linker script saying the code is in 0xf0000000 space22:01
stekernyou can define different load and run addresses with the linker script22:19
juliusbah it's ok - I think my approach was bad22:20
juliusbso I'm interested in running mor1kx out of a "ROM" so all instruction and data accesses are single cycle22:20
juliusbwell, accesse to code literals22:20
juliusbbut RAM obviously may not be single cycle22:20
juliusbjust to test the behaviour of this stuff22:21
juliusbso I'm thinking maybe we should rename the top-level  like mor1kx_wb_wrapper or something22:22
juliusbI like how you've integrated the caches and MMUs more into the pipeline22:22
juliusbwe can basically make mor1kx_cpu the bus-agnostic top-level22:22
juliusband then have bus-interface wrappers22:22
juliusbwith different ports etc.22:22
juliusbbut for now in this system I'm just implementing a mor1kx_cpu in orpsoc and hooking ibus up to a dedicated memroy22:23
stekernyeah, that sounds cool for now.22:24
stekernI was thinking about putting the ROM interface straight in the fetcher22:25
stekernand parameterise away all redundant logic in that mode22:25
juliusba ROM interface for a TCM or something?22:26
stekernbecause, the way I have it now, all wb-accesses are "protected" by being registered (you could of course just parameterise that protection, but you still get some overhead by the wb-bus)22:27
juliusb"protected" timing path wise?22:28
stekernmy thinking behind that is, cappuccino being the "big muscle" pipeline, you're probably going to have caches enabled if you connect it to some main memory, so the extra cycle there won't be that hurtful22:29
stekerncache refill is seperated from that protection, so that's not having the penalty22:31
juliusbhuh, how is cache refill protecteD?22:31
juliusbthat would certainly go to the wb-bus no?22:32
stekernso, I have basically completely seperated the cache-accesses and bus-accesses (this is icache only so far)22:32
stekernyes, the cache refill goes straight to the wb-bus. But the path for that ends in writing into the cache (basically)22:33
stekernso that's not so critical22:33
juliusbjust as I suspected - prontoespresso doesn't run even the simplest tests :)22:49
juliusbnot sure why not yet, thuogh22:50
juliusboh, dbus craps out, probably didn't hook it up right. d'oh!22:51
stekernthat's what usually happen when I change something too, I've forgot to connect signals all over the place22:56
stekernand nothing even compiles because of all the typos22:56
stekernmail ohoy ;)22:57
juliusbawesome man :)22:57
juliusbthoroughly epic22:58
stekernand on that bombshell, bedtime :)22:58
juliusbi want to see a cat /proc/cpuinfo before I believe it :)22:59
stekernI didn't connect the keyboard to it, you just have to take my word for it =P23:00
juliusbsure, sure :)23:07
--- Log closed Sun Mar 24 00:00:36 2013

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